Commit Graph

549 Commits (b51fbe817bfd7810af562103afdf592da182a812)

Author SHA1 Message Date
Jimmy Brisson 6aca976433 Merge pull request #4149 from monkiineko/master
STM32F3: Correct handling of USB ISTR and endpoint registers
2017-05-08 11:16:31 -05:00
Jimmy Brisson c1cbd26f1d Merge pull request #4256 from arostm/dev_disco_lora
DISCO_L072CZ_LRWAN1: add a new platform
2017-05-08 11:15:00 -05:00
Anna Bridge a85873c863 Merge pull request #4248 from screamerbg/fix/stm32-usb-support
Fixed STM32 USB Device support for mbed Classic
2017-05-05 13:51:38 +01:00
Anna Bridge 2d22db23db Merge pull request #4169 from 0x6d61726b/master
[NXP LPC176X] flash_api.c implementation
2017-05-04 15:41:17 +01:00
Laurent MEUNIER 63accf1469 Fix Typo in include file name 2017-05-04 10:51:40 +02:00
Laurent MEUNIER a8d666fe6f F1 CUBE V1.5.0
HAL V1.1.0
LL V1.1.0
CMSIS V4.2.0
2017-05-04 10:31:59 +02:00
Jimmy Brisson 0c2af26523 Merge pull request #4249 from kegilbert/button-mapping-kg
Add consistent button names across targets
2017-05-03 11:26:36 -05:00
arostm 3dac027747 DISCO_L072CZ_LRWAN1: change date in periperalPins.c 2017-05-03 09:20:01 +02:00
Kevin Gilbert 0268c85101 Fixed typos 2017-05-02 13:16:14 -05:00
Kevin Gilbert 418d83b6c2 Addressed review comments: fixed unmapped switches and added Hexiware buttons 2017-05-02 12:20:05 -05:00
Jimmy Brisson 23c86fc539 Merge pull request #4236 from LMESTM/packed_warning
STM32 Fixed warning related to __packed redefinition
2017-05-02 11:24:38 -05:00
arostm c9173db9cf DISCO_L072CZ_LRWAN1: peripheralPins add and change comments 2017-05-02 12:53:25 +02:00
arostm e51c6942cf DISCO_L072CZ_LRWAN1: prepipheralPins and PinNames correction 2017-05-02 12:53:25 +02:00
arostm 4f2850e283 DISCO_L072CZ_LRWAN1: Typo correction 2017-05-02 12:53:25 +02:00
arostm 6572660204 DISCO_L072CZ_LRWAN1: Typo correction in peipheralPins.c and PinNames.h 2017-05-02 12:53:25 +02:00
arostm 64f8c9650b DISCO_L072CZ_LRWAN1: PinsName.h => PA_5 changed with PB_13 for the
SPI_SCLK
2017-05-02 12:53:25 +02:00
arostm d7c48d6dbd DISCO_L072CZ_LRWAN1: typo correction 2017-05-02 12:53:25 +02:00
arostm 729ed8f493 DISCO_L072CZ_LRWAN1: PinNames.h correction (USB TX and RX) 2017-05-02 12:53:25 +02:00
arostm bffe629563 DISCO_L072CZ_LRWAN1: Clock configuration => 30MHz to 32MHz 2017-05-02 12:53:25 +02:00
arostm 29d5818837 DISCO_L072CZ_LRWAN1: PreipheralPins.c corrections 2017-05-02 12:53:25 +02:00
arostm 97605ddd5a DISCO_L072CZ_LRWAN1: Change LED PIN definition 2017-05-02 12:53:25 +02:00
Alexis ROCHE 93bce7364c DISCO_L072CZ_LRWAN1: typo correction 2017-05-02 12:53:25 +02:00
Alexis ROCHE a59c4ff8a7 DISCO_L072CZ_LRWAN1: add LRWAN1 to the name 2017-05-02 12:53:25 +02:00
Alexis ROCHE 19109d9404 DISCO_L072CZ: Modifications and verifications to build 2017-05-02 11:50:24 +02:00
Alexis ROCHE 7529b8300b DISCO_L072CZ: Add all files (pinout, startup, etc...) 2017-05-02 11:46:40 +02:00
Adam Green 5f13d955ad Fix C++11 build error w/ u-blox EVK-ODIN-W2
When attempting to perform a test build of various mbed-os targets with
GCC configured to build -std=gnu++11, all of the targets built
successfully except for this one. It gave errors like this:
    ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp: In function 'emac_interface_t* wifi_emac_get_interface()':
    ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:331:38: error: use of deleted function 'emac_interface::emac_interface()'
             _intf = new emac_interface_t();
                                          ^
    In file included from ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:9:0:
    ../mbed-os/hal/emac_api.h:150:16: note: 'emac_interface::emac_interface()' is implicitly deleted because the default definition would be ill-formed:
     typedef struct emac_interface {
                    ^
    ../mbed-os/hal/emac_api.h:150:16: error: uninitialized const member in 'struct emac_interface'
    ../mbed-os/hal/emac_api.h:151:32: note: 'const emac_interface_ops_t emac_interface::ops' should be initialized
         const emac_interface_ops_t ops;

This commit contains a proposed change which fixes this issue by not
using the new operator to allocate the emac_interface_t structure but
instead using the malloc() function since the construction is being
handled explicitly in the subsequent lines of the
wifi_emac_get_interface() function anyway.

I also added code which only completes the initialization of the _intf
object if its allocation succeeds and just returns NULL otherwise.

I see no deallocation of the _intf object occurring so no change from
delete to free() needed to be made.
2017-04-28 14:09:31 -07:00
Kevin Gilbert 28d1ac5a44 Added mapping to USER_BUTTON-labelled switches
Revert HRM1017 file source deletion

Added in small comment next to additions

Added mapping to BTN-labelled switches

Added mapping to USER_BUTTON-labelled switches

Undo incorrect mapping to SWIO pin in NORDIC target
2017-04-28 11:37:23 -05:00
Mihail Stoyanov 301ce550c9 Fixed STM32 USB Device support by migrating all specific target headers to unsupported features where they belong until USB support is officially introduced in mbed OS 5 2017-04-28 17:23:07 +01:00
Laurent MEUNIER 4eea8fa863 STM32 Fixed warning related to __packed redefinition
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0:  #3135-D: attribute does not apply to any entity

This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.

This is solve by adding a extra check on __CCARM .
2017-04-27 10:32:00 +02:00
Bradley Scott 7f12ad2a8c STM32F3: Correct handling of USB ISTR and endpoint registers
The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits.  As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.

Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write.  These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
2017-04-26 10:23:02 -04:00
Indrek Ardel 16a1693534 Move target files 2017-04-22 20:49:20 +03:00
Indrek Ardel 189083eeb0 Add USB capabilities to NUCLEO-F446RE board 2017-04-22 20:47:55 +03:00
Anna Bridge 1c77628149 Merge pull request #4153 from jeromecoutant/PR_AF2_LEVEL0
STM32F2: Internal ADC channels rework
2017-04-21 14:11:44 +01:00
Anna Bridge e3f457b4d5 Merge pull request #4154 from jeromecoutant/PR_F7_LEVEL0
STM32F7 Internal ADC channels rework
2017-04-20 16:50:34 +01:00
Anna Bridge 743ab7eb59 Merge pull request #4176 from jeromecoutant/PR_L4_LEVEL0
STM32L4 Internal ADC channels rework
2017-04-20 16:39:38 +01:00
Anna Bridge 6a6455dfc2 Merge pull request #4031 from jeromecoutant/PR_IAR_BIG_HEAP
STM32 increase IAR heap size for big RAM targets
2017-04-20 15:50:21 +01:00
Sam Grove 7bd8c32f2d Merge pull request #4133 from u-blox/c030-debug-8mhz-xtal
U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz
2017-04-19 02:14:51 -05:00
jeromecoutant 03972ebb0c STM32L4 Internal ADC channels rework
Internal ADC pins are now out of PinMap_ADC array
2017-04-12 13:14:58 +02:00
0x6d61726b 029736612b typo corrected
typo corrected
2017-04-11 21:28:11 +02:00
0x6d61726b 8c6dd8949b Update flash_api.c
mbed_critical.h replaced with "platform/mbed_critical.h" (to match template)
typo corrected
2017-04-11 21:24:40 +02:00
0x6d61726b b0451324c4 deprecated include updated
critical.h is deprecated, replaced with "platform/mbed_critical.h"
typo corrected
2017-04-11 21:23:19 +02:00
jeromecoutant d1fa95184f STM32F7 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array
2017-04-11 12:56:13 +02:00
jeromecoutant 43ab8812d7 STM32F2 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array
2017-04-11 11:16:46 +02:00
jeromecoutant 7da6960cfe NUCLEO_F207ZG: I2C_3 is not available 2017-04-11 10:41:57 +02:00
jeromecoutant 613cc3d6d9 STM32F4 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array.
2017-04-11 10:12:25 +02:00
Sam Grove 2352ee49a4 Revert "STM32F4 Internal ADC channels rework" 2017-04-10 12:08:15 -05:00
Sam Grove 0559aa431c Merge pull request #4126 from jeromecoutant/PR_F4_PIN_LEVEL0
STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins
2017-04-10 11:09:51 -05:00
Sam Grove bfb86a7f51 Merge pull request #4125 from jeromecoutant/PR_F4_USB_CONFIG_FILE
STM32 USB configuration file move
2017-04-10 11:07:59 -05:00
Sam Grove 516f32fc86 Merge pull request #4118 from jeromecoutant/PR_REWORK_INTERNAL_ADC_F4
STM32F4 Internal ADC channels rework
2017-04-10 11:06:12 -05:00
Rob Meades a39ed809c4 U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz
XTAL by using Macro USE_DEBUG_8MHz_XTAL
2017-04-07 12:01:46 +01:00
Sam Grove 7a35a4df51 Merge pull request #3992 from u-blox/c030-dev
Introducing UBLOX_C030 platform.
2017-04-06 11:07:58 -05:00
Sam Grove f3499f5014 Merge pull request #4109 from jeromecoutant/PR_L476RG
NUCLEO_L476RG : minor serial pin update
2017-04-06 10:56:50 -05:00
Sam Grove 58f4b4103f Merge pull request #4030 from jeromecoutant/PR_IAR_SMALL_HEAP
[STM32L0] reduce IAR heap and stack size for small targets
2017-04-06 08:49:02 -05:00
jeromecoutant d740bde646 STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins
Pins are used for debug printf
2017-04-06 13:58:06 +02:00
jeromecoutant 5303211056 STM32F3 USB configuration file move 2017-04-06 11:53:06 +02:00
jeromecoutant 3bbbabf202 STM32L4 USB configuration file move 2017-04-06 11:51:26 +02:00
jeromecoutant 36319969f4 STM32F7 USB configuration file move 2017-04-06 11:45:18 +02:00
jeromecoutant c2636b3269 STM32F4 USB configuration file move 2017-04-06 11:33:49 +02:00
jeromecoutant d599579328 STM32F4 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array.
2017-04-06 10:59:49 +02:00
Rob Meades 7387c09872 Introducing UBLOX_C030 platform. 2017-04-04 16:22:50 +01:00
jeromecoutant 0c2720bc19 NUCLEO_L476RG : minor serial pin update
SERIAL_TX and SERIAL_RX pins used for debug printf cannot be set as available
2017-04-04 14:38:17 +02:00
bcostm 3302a372ef DISCO_L053C8: Typo corrections 2017-03-30 14:55:18 +02:00
bcostm 2212b34bd0 DISCO_L053C8: add USBHAL_STM files 2017-03-30 14:50:13 +02:00
bcostm 1321dc8e71 DISCO_L053C8: enable HSI48 clock for USB 2017-03-30 14:50:13 +02:00
Sam Grove e3c0ac6c17 Merge pull request #4020 from jeromecoutant/PR_L011
NUCLEO_L011K4 remove unsupported tool chain files
2017-03-29 22:50:35 +01:00
Sam Grove d467f7d4bc Merge pull request #4012 from monkiineko/master
STM32: Correct I2C master error handling
2017-03-29 22:49:15 +01:00
0xc0170 424fd78161 flash: fix flash algo generated - protect with DEVICE_FLASH 2017-03-26 17:59:40 +01:00
Bradley Scott 2eb4048bbe STM32: Correct I2C master error handling
If I2C slave support is included, then the I2C error handler would
always reset the I2C address, resulting in incorrectly changing the
I2C state to listen for a controller configured as I2C master.  This
change conditionalizes the address setting to only occur if the
controller was in slave mode when the error occurred.
2017-03-24 10:16:34 -04:00
jeromecoutant 4193202f40 STM32 increase IAR heap size for big RAM targets 2017-03-24 14:51:13 +01:00
jeromecoutant d680c60fe9 [STM32L0] reduce IAR heap and stack size for small targets 2017-03-24 14:32:13 +01:00
jeromecoutant 2f8d54ab07 NUCLEO_L011K4 remove unsupported tool chain files 2017-03-23 17:56:45 +01:00
Sam Grove 75f6f2db30 Merge pull request #3969 from bcostm/fix_nucleo-f302r8_can_pins
NUCLEO_F302R8: Add missing PB_8/PB_9 CAN pins
2017-03-22 12:08:16 +00:00
Sam Grove 2ec6ee4a24 Merge pull request #3951 from jeromecoutant/PR_F303ZE
[NUCLEO_F303ZE] Correct ARDUINO pin
2017-03-22 12:06:51 +00:00
Sam Grove 3d50554105 Merge pull request #3920 from mazimkhan/master
Heap size adjusted to work for both tls-client and mbed-client
2017-03-22 12:04:01 +00:00
bcostm 7cc904bb19 NUCLEO_F302R8: Add missing PB_8/PB_9 CAN pins 2017-03-20 10:32:06 +01:00
jeromecoutant 2987340870 [NUCLEO_F303ZE] Correct ARDUINO pin 2017-03-16 16:40:30 +01:00
Mohammad Azim Khan 5a9ea2c1e6 Heap size adjusted to work for both tls-client and mbed-client
Targets NUCLEO_F429ZI and UBLOX_EVK_ODIN_W2 have 192K RAM.
Heap size in PR #3871 was increased from 48K to 96K as tls-client
example failed with 48K heap. But this resulted in compilation failures
in mbed-client that requires 71K for global/static data.
Hence this PR reduces heap to 64K that minimum required by tls-client
to work. This also meets mbed-client data segment requirements.
2017-03-15 11:22:24 +00:00
Michel Jaouen 1a20b4f100 Fix after code review 2017-03-14 15:57:41 +01:00
Michel Jaouen fc972f0a98 fix STM USB config after L4 ,F4, F7 file tree changes 2017-03-14 15:57:40 +01:00
Michel Jaouen 873cacfc73 Revert "Revert "Target stm usb config""
This reverts commit ec329be6f2.
2017-03-14 15:57:28 +01:00
Anna Bridge 213626d83a Merge pull request #3893 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F7_V1.6.0
[STM32F7] Update STM32 Cube version v1.6.0
2017-03-14 14:40:38 +00:00
Sam Grove 88a4baa2ad Merge pull request #3902 from mazimkhan/master
Fix heap and stack size for NUCLEO_F746ZG
2017-03-09 16:51:40 -06:00
Mohammad Azim Khan bb197b29f3 Fix heap size for NUCLEO_F746ZG on IAR 2017-03-09 16:51:24 +00:00
Martin Kojtal 45c99e69ca Merge pull request #3879 from bcostm/fix_nucleo-f446ze_adc_pins
NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10.
2017-03-09 15:48:10 +00:00
Martin Kojtal 68dc25331a Merge pull request #3843 from bcostm/fix_stm32l4_apb2_80MHz
STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz)
2017-03-09 15:44:08 +00:00
Simon Vogl 1c4e0d7dcb can_write(): return error code when no tx mailboxes are available. (#3829) 2017-03-09 15:42:00 +00:00
Martin Kojtal 6aa62c1956 Merge pull request #3828 from jeromecoutant/PR_CAN_TYPE
STM32 CAN API: correct format and type
2017-03-09 15:40:01 +00:00
Martin Kojtal fd6fdd5f8c Merge pull request #3795 from LMESTM/fix_pwm_period_calc
Fix pwm period calc
2017-03-09 15:39:00 +00:00
Laurent MEUNIER 400b89eeda Fix XDOT compilation error
Typo with misplaced closing parenthesis leads to compilation error,
which is fixed with this patch
2017-03-07 17:22:25 +01:00
Martin Kojtal b2726470f6 Merge pull request #3880 from adustm/fix_can2_only
DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated
2017-03-06 16:57:57 +00:00
Martin Kojtal f39deb518c Merge pull request #3860 from MultiTechSystems/xdot-gpio-fix
Define GPIO_IP_WITHOUT_BRR for xDot platform
2017-03-06 16:56:29 +00:00
Martin Kojtal e6b8ed2754 Merge pull request #3850 from LMESTM/fix_spi_warn
STM32: change spi error to debug warning
2017-03-06 16:55:58 +00:00
Martin Kojtal aa6a71bd0c Merge pull request #3844 from bcostm/fix_comments_gpio_object
STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR)
2017-03-06 16:54:39 +00:00
Martin Kojtal ede2a11be4 Merge pull request #3840 from LMESTM/fix_smt32_gpio_default_speed
STM32: gpio SPEED - always set High Speed by default
2017-03-06 16:54:08 +00:00
Martin Kojtal 8fb95a6507 Merge pull request #3780 from pmancele/master
STM32L4 : Fix GPIO G port compatibility
2017-03-06 16:51:03 +00:00
Martin Kojtal 750ac5152f Merge pull request #3741 from jeromecoutant/PR_TICK32
STM32 remove warning in hal_tick_32b.c file
2017-03-06 16:49:52 +00:00
Martin Kojtal f168f6233a Merge pull request #3716 from adustm/disco_f429zi_debug
fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files
2017-03-06 16:49:19 +00:00
jeromecoutant b77533dd51 STM32Cube_FW_F7_V1.6.0
CMSIS v1.1.2 => v1.2.0
    STM32F7 HAL v1.1.2 => v1.2.0
2017-03-06 16:48:23 +01:00
bcostm ae6899b448 STM32L4xx: set APB2 clock to 80MHz (instead of 40MHz) 2017-03-06 13:34:01 +01:00
jeromecoutant 67a75d96c6 STM32 CAN API: correct format and type
astyle done
2017-03-06 11:34:20 +01:00