dbestm
31defa8bcd
[xxx_F4XX] remove erasing of BkUpR in RTC API
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the erasing of back up register is only needed when using LSI in RTC API
2016-04-01 11:39:51 +02:00
dbestm
9d60138873
[xxx_L476XG] remove erase of BkUpR in RTC API
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the erase of back up regsiters are needed only when using RTC+LSI
2016-04-01 11:18:06 +02:00
dbestm
fe0ea5c436
[XXX_F0XX] enhance RTC api
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add define to select LSI or LSE
modify rtc api accordingly
2016-04-01 10:50:46 +02:00
dbestm
f6cafe37c8
[XXX_F3XX] enhance rtc api
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add define to select LSI or LSE, update rtc api accordingly
2016-03-31 17:34:42 +02:00
mtkrtk
641a2dc414
Enable caches to improve performance
2016-03-31 21:55:13 +09:00
dbestm
8a1a67d189
[xxx_F746XG] enhance RTC api
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to support LSI and LSE with a define in device.h
2016-03-31 10:44:01 +02:00
dbestm
e42e174852
[XXX_L15XXX] enhance RTC files
2016-03-30 17:49:39 +02:00
mtkrtk
fd02430291
spi_asynch test passed
2016-03-30 22:29:42 +09:00
mtkrtk
9ef1d7b2f4
spi_asynch test passed
2016-03-30 20:29:46 +09:00
mtkrtk
2a0b00008b
Fix settings
2016-03-30 20:24:10 +09:00
mtkrtk
418fd7ec94
serial_async test passed
2016-03-30 09:21:51 +09:00
ducky64
c74a616be6
Make Nucleo F303K8 number of interrupts consistent with amount of SRAM
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reserved by linker scripts
2016-03-26 12:44:43 -07:00
bcostm
18f90871db
Replace tabs with spaces
2016-03-25 14:56:56 +01:00
bcostm
481a451f2c
Update LSI typical value to 38MHz (datasheet value)
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MBED_16 test re-checked ok with LSI on the 3 STM32L0 platforms.
2016-03-25 14:56:01 +01:00
bcostm
3d6e522177
Move rtc_api.c in upper folder
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This file should be common for all L0 targets.
2016-03-25 14:08:04 +01:00
Martin Kojtal
286b61db8a
Merge pull request #1554 from bcostm/stm32l4_arm_startup_files
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[STM32L4] Update ARM_MICRO startup files
2016-03-24 10:21:16 +01:00
mtkrtk
8a6d2b0835
Enable asynchronous communications
2016-03-24 16:25:22 +09:00
mtkrtk
1df975a3a5
Enable asynchronous communications
2016-03-24 16:08:43 +09:00
dbestm
3e896871e6
[xx_L476xx] update LSI timeout defines
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move hal_conf.h in device folder
clean define related to LSI timeout
2016-03-24 07:44:00 +01:00
Martin Kojtal
dd3cba536f
Merge pull request #1622 from c1728p9/fix_kl05_uart_clock
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Prevent KL05 from using an unstable clock
2016-03-24 07:15:23 +01:00
Martin Kojtal
ff9d4e2266
Merge pull request #1625 from dbestm/dev_l0x3_rtc
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[xxx_L0X3] debug RTC to add a proper init check feature
2016-03-24 07:03:30 +01:00
dbestm
6dbe57b058
[xxx_L0X3] debug RTC to add a proper init check feature
2016-03-21 15:01:11 +01:00
Russ Butler
273b464fe0
Prevent KL05 from using an unstable clock
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Add a delay after switching to the FEE clock mode so the FLL has a
chance to acquire a better lock. This fixes a bug where the first byte
sent over the UART is corrupt.
2016-03-20 19:40:13 -05:00
Martin Kojtal
1f340445d5
Merge pull request #1615 from MultiTechSystems/hardfault-handler
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add hard fault handlers for MultiTech mDot and Dragonfly platforms
2016-03-18 08:27:55 +00:00
Martin Kojtal
0a0fcbb5fd
Merge pull request #1603 from arnaudrichard/master
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Fix IRQ enabled in serial_irq_set()
2016-03-17 15:34:27 +00:00
bcostm
0ae3ed496d
Remove I2C PA11 and PA12 pins
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There is no I2C on these pins.
2016-03-17 08:44:46 +01:00
Mike Fiore
ba2a974fd1
add hard fault handlers for MultiTech mDot and Dragonfly platforms
2016-03-16 12:55:50 -05:00
Martin Kojtal
3afb550952
Merge pull request #1611 from bcostm/dev_rtc_stm32f4
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[STM32F4] Add DEVICE_RTC_LSI=0 to all targets
2016-03-15 08:54:05 +00:00
Martin Kojtal
2144dadad2
Merge pull request #1608 from MultiTechSystems/f4-serial-overrun
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avoid getting stuck in serial IRQ if ORE is set without RXNE
2016-03-14 16:02:28 +00:00
bcostm
9db204bcf0
Add DEVICE_RTC_LSI=0
2016-03-14 16:01:24 +00:00
bcostm
b956e27237
Add DEVICE_RTC_LSI = 0 to all targets
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Added for clarity. This flag must be set to 1 if the LSE xtal is not
present on the board or if the RTC must be clocked by the internal
clock.
2016-03-14 14:26:27 +01:00
tomoyuki yamanaka
23c02e1675
Modify macro value of device error in device.h.
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We modified the value of "DEVICE_STDIO_MESSAGES" and "DEVICE_ERROR_PATTERN" in order to output the error message.
2016-03-14 11:24:37 +09:00
Mike Fiore
68b034541a
avoid getting stuck in serial IRQ if ORE is set without RXNE - issue #1605
2016-03-11 11:49:03 -06:00
Martin Kojtal
f178fc4835
Merge pull request #1602 from sunsmilearm/master
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Change the uart pin to DIP pin for XBED_LPC1768
2016-03-11 09:10:17 +01:00
Arnaud RICHARD
cbcdfab741
Fix IRQ enabled in serial_irq_set()
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UART_IT_TC was enabled instead of UART_IT_TXE
This was causing an issue because UART_IT_TXE (and not UART_IT_TC) was disabled by same function.
Consequently if a transfer was ongoing when serial_irq_set() was called to disable IRQ, UART_IT_TC would still trigger (once).
Side effect is maybe speed: I guess using UART_IT_TC prevented implementation of continuous transfer.
This commit is focused on solving an issue observed with TARGET_STM32F4. It doesn't presume it should or shouldn't be done for other targets.
2016-03-10 14:40:41 +01:00
sunsmilearm
30df100f88
Update PinNames.h
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Change the "tab" to 4 "space"
2016-03-10 17:57:53 +08:00
Xiao Sun
7569cdfda4
Change the uart pin to DIP pin
2016-03-10 14:10:03 +08:00
Martin Kojtal
6501de9044
Merge pull request #1548 from dbestm/dev_F446_rtc
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[NUCLEO_F446RE] RTC+LSE+init
2016-03-09 17:55:20 +00:00
dbestm
81f3abc770
Merge remote-tracking branch 'refs/remotes/mbedmicro/master' into dev_F446_rtc
2016-03-09 15:40:37 +01:00
Martin Kojtal
2c6c939564
Merge pull request #1580 from ohagendorf/f3xx_adc
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[STM32F3xx] bug fix multiple ADC channels using multiple ADC blocks
2016-03-09 08:33:47 +00:00
Martin Kojtal
ee20d03969
Merge pull request #1588 from adustm/master
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[STM32F7] Update STM32F7Cube_FW version
2016-03-07 09:45:59 +00:00
Martin Kojtal
abf43a33ce
Merge pull request #1587 from neilt6/master
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[LPC11U68, LPC1549] Fixed PwmOut SCT Bugs
2016-03-05 06:52:10 +01:00
neilt6
b3e2763784
[LPC11U68, LPC1549] Improved PwmOut Documentation
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Improved commenting in pwmout_write(), pwmout_period_us(), and
pwmout_pulsewidth_us().
2016-03-04 09:23:23 -07:00
adustm
c97e05f496
[STM32F7_NUCLEO_F746ZG] Update target files with latest STM32F7Cube_FW version
2016-03-04 14:32:17 +01:00
adustm
49338852ad
[STM32F7_DISCO_F746NG] Update target files with latest STM32F7Cube_FW version
2016-03-04 14:32:00 +01:00
adustm
0b9cc09727
[STM32F7] Update STM32Cube_FW version
2016-03-04 14:28:07 +01:00
Toyomasa Watarai
a86504d205
[LPC824] Add more comments for PwmOut fix
2016-03-04 16:00:32 +09:00
neilt6
792b359a36
[LPC11U68, LPC1549] Fixed PwmOut SCT Bugs
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* 0% duty cycle now reads back correctly
* Period & pulse-width changes now take effect immediately if the timer
is halted
2016-03-03 15:28:59 -07:00
Toyomasa Watarai
6ab159af26
[LPC824] Fixed PwmOut SCT Bugs
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* Fixed period & pulse-width off-by-one errors
* Fixed 0% and 100% duty cycle output
2016-03-03 17:09:35 +09:00
Martin Kojtal
de3b14ec92
Merge pull request #1576 from PeterConheeney/master
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latest changes to add arduino support, plus fixes for IOTSS BEID
2016-03-02 15:29:53 +01:00
Peter Conheeney
ca41874978
disabled i2c slave
2016-03-01 08:51:08 +00:00
adustm
5376c62f3d
[STM32F7 family] fix issue with RTC init
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the logical test for RTC_ISR_INITS was wronlgy reported from other
STMfamilies.
MBED_16 test works with this modification.
2016-03-01 08:03:23 +01:00
ohagendorf
f96f9c2e2e
[STM32F3xx] bug fix multiple ADC channels using multiple ADC blocks
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When two or more analogue inputs are initialized on more than one ADC HW block the initialisation fails with:
Cannot initialize ADC
The reason is the reusage of just one ADC_HandleTypeDef for all initializations (in mbed\targets\hal\TARGET_STM\TARGET_STM32F3\analogin_api.c). After the first (successful) ADC initialisation AdcHandle.State is set to HAL_ADC_STATE_READY).
But for another ADC block initialisation the AdcHandle.State has to be reset so that the HAL initialize it (in mbed\targets\cmsis\TARGET_STM\TARGET_STM32F3\stm32f3xx_hal_adc_ex.c line 424). When this state is not reset the HAL returns with an initialization error. And this error induces the above mbed error message.
The error message can be reproduced just with AnalogIn in1(xx); AnalogIn in2(yy); where xx and yy belongs to two different ADC blocks.
2016-02-29 23:50:07 +01:00
Peter Conheeney
cd524f3d43
removed empty functions
2016-02-29 12:23:05 +00:00
Peter Conheeney
bec257786a
commit of latest changes to arduino support, plus fixes for IOTSS BEID
2016-02-29 12:02:47 +00:00
Martin Kojtal
01648b2a3b
Merge pull request #1573 from mtkrtk/analogin_patch
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[Renesas RZ/A1H] Fix analogin peripheral names
2016-02-29 12:32:34 +01:00
mtkrtk
1a3a19bb08
Fix analogin peripheral names
2016-02-29 17:06:32 +09:00
dc37
775c5c9eb2
Fix clock configuration for LPC1549.
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Datasheet (Table 82) says MSEL bits should be 5, and the PSEL bits should
be 1, for the correct FCCO frequency of 288MHz. The current configuration
has FCCO = 144MHz, which is technically out of spec.
Tested on a custom LPC1549 board with crystal oscillator running at 12MHz.
2016-02-26 19:42:26 -06:00
Martin Kojtal
bd0417cb15
Merge pull request #1520 from adustm/b_b96b_can
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[STM B96B_F446VE] Add CAN feature
2016-02-26 17:07:15 +00:00
adustm
d53f444a6f
[STM32F7 family] revert RTC change in this PR that is due to new platform. It will be done through a separate PR.
2016-02-26 11:36:59 +00:00
adustm
3b3f89294e
[NUCLEO_F746ZG] fix pins and system files after manual and automatic test phase
2016-02-26 11:36:57 +00:00
adustm
1ecd69bd87
[STMF7 family] add more SPI and I2C for the new NUCLEO_F746ZG platform
2016-02-26 11:36:54 +00:00
adustm
d47d87c869
[NUCLEO_F746ZG] 8MHz, not 25
2016-02-26 11:36:52 +00:00
adustm
0068bb55d2
[NUCLEO_F746ZG] cmsis toolchain files
2016-02-26 11:36:46 +00:00
adustm
809afe7802
[NUCLEO_F746ZG] cmsis files
2016-02-26 11:36:44 +00:00
adustm
252056c17d
[NUCLEO_F746ZG] HAL Files
2016-02-26 11:36:42 +00:00
adustm
c6e57e50a0
[NUCLEO_F746ZG] Add new target to hal files
2016-02-26 11:36:37 +00:00
Martin Kojtal
c00b00481f
Merge pull request #1564 from neilt6/lpc1549-analogin-fix
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[LPC1549] Improve AnalogIn Performance
2016-02-26 07:43:53 +00:00
Martin Kojtal
fb3928665a
Merge pull request #1560 from kgills/i2c_byte_write_fix
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[MAX32600MBED MAXWSNENV] Fixing the return for i2c_byte_write.
2016-02-25 10:12:51 +00:00
Martin Kojtal
8577dc9680
Merge pull request #1558 from dbestm/dev_l476rg_rtc
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l476rg rtc
2016-02-25 09:42:00 +00:00
Martin Kojtal
8e70fc70ed
Merge pull request #1556 from mtkrtk/develop
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[Renesas RZ/A1H] Enable SPI_3 on GR-PEACH
2016-02-25 09:33:38 +00:00
neilt6
6525b8ee3e
[LPC1549] Improve AnalogIn Performance
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Modified the LPC1549 AnalogIn implementation to use the ADCs in
synchronous mode, which is consistent with the LPC11U68 implementation.
This improves performance, and allows the IRC oscillator to be powered
down if necessary.
2016-02-24 14:07:09 -07:00
Kevin Gillespie
9bc9668287
Fixing the return for i2c_byte_write.
2016-02-22 15:45:54 -06:00
adustm
fc84dd9234
[STM32F7 family] fix issue with RTC init
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the logical test for RTC_ISR_INITS was wronlgy reported from other
STMfamilies.
MBED_16 test works with this modification.
2016-02-22 17:20:27 +01:00
adustm
20c34f47ad
[B96B_F446VE] remove spaces (typo)
2016-02-22 15:29:05 +01:00
adustm
8e8af8fb62
[B96B_F446VE] Remove unused IRQ_RX1 interrupt (init / irq_set / ...)
2016-02-22 15:28:47 +01:00
adustm
4a4cb7fb07
[B96B_F446VE] Add more details about the timing_pts table
2016-02-22 15:27:51 +01:00
dbestm
ab3cda47b9
fix formatting
2016-02-22 14:28:20 +01:00
adustm
028465a9b8
[B96B_F446VE] change serial type
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Use only the index, not the UARTName any more.
In case of app with 2 serial (using DMA) + 1 serial (stdio), we have found a bug. The dma handler is overwritten by the last initialized serial object.
Therefore read and write functions did not work anymore.
We have reworked this file to save 1 handler per UART IP, and align it with MBED OS file.
Tests have been passed. Same status as before (OK except MBED_37, manual test for SERIAL_ASYNC also OK).
2016-02-22 13:07:35 +00:00
mtkrtk
9211a3afea
Enable SPI_3
2016-02-20 10:17:51 +09:00
bcostm
c30cb0129e
Update ARM_MICRO startup files
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Fix issue #1348 with stack/heap and with many ST shields.
2016-02-19 16:51:31 +01:00
bcostm
a4cf478240
Set NVIC_RAM_VECTOR_ADDRESS to 0x10000000
2016-02-19 10:09:08 +01:00
modtronix-com
b78542d10e
Changed target name from NZ32SC151 to NZ32_SC151
2016-02-18 09:49:14 +00:00
Martin Kojtal
b57f7d5684
Merge pull request #1545 from TomoYamanaka/master
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Support of export function to the IAR.
2016-02-18 09:42:15 +00:00
dbestm
8b04249028
[NUCLEO_L476RG] RTC+LSE
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make the RTC works properly with LSE and add the possibility to use the
LSI (internal clock)
2016-02-16 17:30:54 +01:00
dbestm
d63cc2109b
[NUCLEO_F446RE] RTC+LSE+init
2016-02-15 17:21:32 +01:00
tomoyuki yamanaka
27caef30a4
Support of export function to the IAR.
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We modified the following to support the export function to the IAR.
- In tools files, add RZ_A1H to the target of IAR.
- In tools files, add the tmpl files.
2016-02-15 14:49:31 +09:00
Parthasarathy.S
a8e52a9fc0
Fixed style and build issue
2016-02-14 21:33:35 +05:30
Parthasarathy.S
86b8516024
Fixed build error
2016-02-14 21:33:33 +05:30
Parthasarathy.S
d578a72b93
Fix for compiler warnings
2016-02-14 21:33:31 +05:30
Moin Shaik
a736139336
Merge branch 'master' of https://github.com/mbedmicro/mbed into peripherals_driver_warnings_fix_ready
2016-02-14 21:33:29 +05:30
0xc0170
9dcb51ce87
Merge branch 'maclobdell-patch-1'
2016-02-12 08:46:36 +01:00
Mac Lobdell
8abc70e657
Fix SAML21J18A.sct
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Remove extra new lines which caused comments to be exposed as code.
2016-02-12 08:45:55 +01:00
Martin Kojtal
c301abb233
Merge pull request #1522 from dinau/disco-uvision4-exporter
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Add uVision4 exporters for DISCO-{F051R8, F100RB, F303VC, F407VG}
2016-02-11 07:53:34 +01:00
Martin Kojtal
66c0620619
Merge pull request #1521 from adustm/b_b96b_serial_flow_control
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[STM B96B_F446VE] HW Control Flow for serial
2016-02-10 08:43:49 +01:00
0xc0170
b28b71e97e
Merge branch 'master' of https://github.com/leibin2014/mbed into leibin2014-master
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Conflicts:
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c
2016-02-01 18:20:15 +00:00
adustm
c11325e11b
[B96B_F446VE] add IRQ_RX1 interrupt
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Can contains 2 fifos. Both generates its own interrupt.
IRQ_RX occurs when a message has arrived in FIFO-0 , FIFO-0 is full or
overrun.
IRQ_RX1 occurs when a message has arrived in FIFO-1 , FIFO-1 is full or
overrun.
2016-02-01 10:13:29 +01:00
dinau
6e45dafa0e
Add uVision4 exporters for DISCO-{F051R8, F100RB, F303VC, F407VG}
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(1) Add above exporters.
(2) Modified only comments in "cmsis_nvic.h" files.
2016-01-31 19:34:42 +09:00
Martin Kojtal
01e730cfb2
Merge pull request #1512 from neilt6/master
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[LPC11U68, LPC1549] Fixed PwmOut SCT Bugs
2016-01-30 16:51:34 +00:00
adustm
6da4190be9
[STM B96B_F446VE] HW Control Flow for serial
2016-01-29 17:59:45 +01:00