* upstream/mbed-os-5.15: (47 commits)
Update mbed version to 5.15.4
Squashed 'features/nanostack/sal-stack-nanostack/' changes from cc03296c27..b3fe5744d1
Squashed 'features/frameworks/nanostack-libservice/' changes from 9a61e73787..c6cae6992a
802.15.4 MCR20A RF driver update
802.15.4 Atmel RF driver update
802.15.4 STM S2LP driver update
Added Wi-SUN statistics interface
Allowed to set Wi-SUN certificates in DISCONNECTED state
Change unrecognised features to a warning, rather than error
Fix assertation ordering in tests
Define mbedtls_ecc_group_to_psa inline for NS world
Remove references to mbed-crypto
Move Mbed Crypto Greentea tests to Mbed TLS
Update Mbed TLS to latest version
Adjust Mbed TLS importer and config script
tls: Remove apache-2.0.txt from importer script
tools: Fix grammar in feature error message
M2351: Enable non-PSA minimal secure build
Cellular: Enable tac info for ALT1250
Nuvoton: Change WDT clock source to LXT
...
Update Mbed OS's PSA Crypto service to work with Mbed Crypto 3.x.
- psa_asymmetric_verify() is now called psa_verify_hash().
- psa_asymmetric_sign() is now called psa_sign_hash().
Compatibilty wrappers are provided via crypto_compat.h for source-level
backwards compatibility.
As the `psa` library is not included in the baremetal profile, perform
a TFM system reset only if the `psa` library is included in
the build otherwise perform a normal CMSIS system reset.
* Make mbed_error use bitwise MbedCRC call rather than local
implementation.
* Remove use of POLY_32BIT_REV_ANSI from LittleFS.
* Move some MbedCRC instances closer to use - construction cost is
trivial, and visibility aids compiler optimisation.
4-byte addressing has been seen to cause failures on NORDIC
boards and with Macronix memories. Suppress the attempt to enable it
on that hardware (via vendor quirks and a target check) until either
the failure cause can be fixed or a more robust suppression mechanism
is implemented.
Use a vendor id check to only perform this enable on devices which define the
second configuration register where the fast mode enable bit lives.
Change _enable_fast_mode to use the standard status register reading and writing functions
Default to 2 status registers, but update this value if necessary
during vendor quirk handling for parts (currently only Macronix)
which have one status register and two control registers. For the
purposes of QSPIFBlockDevice, these are all considered status
(or at least "status-like") registers because they are all written
via the Write Status Register instruction.
Set the custom RDCR instruction for Macronix during quirk handling.
Update reading and writing of status registers to handle a variable
number of status registers.
Introduce a separate function for handling alterations to device interaction
which are not covered by the SFDP tables and therefore require checking against
the vendor id.
QSPIFBlockDevice::_clear_block_protection() has logic to retain the
WIP and WEL bits in status register 1, but it failed to account for
the situation where the QE bit is also in status register 1.
In _sfdp_set_quad_enabled, note the status register and bit therein
for the quad enable, so that _clear_block_protection can retain it.