Russ Butler
8ef1a73735
Remove tickless assert for tick count
...
Remove the assert that the tick count of the OS matches the tick
count of the tickless timer as this occurs frequently when
debugging. This is because the function svcRtxKernelResume
only increments the OS's tick count until the next wakeup event
so if the device was halted by a debugger past the next wakeup
event the tick counts will be out of sync.
2018-01-25 15:27:35 -06:00
drewcassidy
bc3d9380dc
add LOWPOWERTIMER and I2C_ASYNC to nrf51822 unified
2018-01-25 10:30:00 -08:00
Christopher Haster
471d99c68f
Added pretty bar printing for compile output
...
Looks like this:
Building project mbed-os-prettyoutput (ARCH_PRO, GCC_ARM)
Scan: .
Scan: env
Scan: mbed
Scan: FEATURE_LWIP
Text 70.5KB Data 2.72KB BSS 7.43KB ROM 73.2KB RAM 10.1KB
ROM [||||||| ] 73.2KB/512KB
RAM [|||||||||||||||| ] 10.1KB/32KB
Image: BUILD/ARCH_PRO/GCC_ARM/mbed-os-prettyoutput.bin
If you build a target without a cmsis-pack it looks like this:
Building project mbed-os-prettyoutput (ARM_BEETLE_SOC, GCC_ARM)
Scan: .
Scan: env
Scan: mbed
Scan: FEATURE_BLE
Text 99KB Data 2.84KB BSS 13KB ROM 102KB RAM 15.8KB
Image: BUILD/ARM_BEETLE_SOC/GCC_ARM/mbed-os-prettyoutput.bin
And the old behaviour of displaying the memap table can be brought back
by passing the --stats-depth parameter
2018-01-25 11:46:23 -06:00
Andrew Cassidy
8ba0943af0
move OSHCHIP to be with other nRF51 boards
2018-01-25 08:24:39 -08:00
Andrew Cassidy
8bf51ac159
remove redundent device_has
2018-01-25 08:24:39 -08:00
drewcassidy
5547a09f20
fix typo 😖
2018-01-25 08:24:39 -08:00
drewcassidy
e06d1db8ac
Add pinout diagram
2018-01-25 08:24:39 -08:00
drewcassidy
8cb421d585
Clean up board definition to conform to the target spec
2018-01-25 08:24:39 -08:00
drewcassidy
a6c69567ee
add board header files
2018-01-25 08:24:38 -08:00
drewcassidy
fe6b6af26c
Add target for OSHChip
2018-01-25 08:24:38 -08:00
jeromecoutant
c26db91a09
MTB_XX : STDIO configuration
...
Here is a proposition
- to align with other STM32
- and to remove compilation warnings :
[Warning] PeripheralNames.h@38,0: "STDIO_UART" redefined
2018-01-25 15:46:36 +01:00
Martin Kojtal
26d0c6dcaf
Merge pull request #5932 from ARMmbed/revert-5821-add_BL_nucleo-f746zg
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Revert "STM32F7: Add bootloader support"
2018-01-25 13:40:20 +00:00
jeromecoutant
e6ec285a6b
NUCLEO_F401RE : PeripheralPins file update
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Default SERIAL pins are now available for ADC and PWM
when STDIO_UART_TX and STDIO_UART_RX are user defined
https://os.mbed.com/teams/ST/wiki/STDIO
Alternative pins have been also defined
2018-01-25 13:52:17 +01:00
Martin Kojtal
6d52c1c067
Revert "STM32F7: Add bootloader support"
2018-01-25 11:07:01 +00:00
bcostm
7ff1cf52c0
STM32F0 uart irq: test IT flags for usart3/4
2018-01-25 11:23:53 +01:00
bcostm
18659ab16b
STM32F0: manage better uart3 & 4 irqs
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Manage the case where both uart3 and uart4 interrupts are arriving at the same time.
2018-01-25 11:15:55 +01:00
bcostm
eaa3e9d2b2
STM32F0 usart irq: fix issue with F070/F072
2018-01-25 11:15:55 +01:00
bcostm
b6c9178d88
STM32F0: fix usart irq management
2018-01-25 11:15:54 +01:00
Christopher Haster
13ddd161cf
littlefs: Set specific hash for littlefs-fuse testing
2018-01-24 18:27:47 -06:00
Christopher Haster
6e5f2439a3
littlefs: Adopted the block device sync function
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Required to garuntee that data is flushed all the way down to the disk
level when a file is synced or closed.
2018-01-24 18:07:47 -06:00
Christopher Haster
a4f8af9d5b
bd: Adopted the sync function in the util block devices
2018-01-24 18:07:35 -06:00
Christopher Haster
3f5d618c89
bd: Add sync function to the block device API
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/** Ensure data on storage is in sync with the driver
*
* @return 0 on success or a negative error code on failure
*/
virtual int sync()
2018-01-24 17:58:20 -06:00
deepikabhavnani
afe8834bb8
CRC class implementation
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CRC class `MbedCRC.h` is templated class created to support hardware/software
CRCs. Default CRC will be hardware CRC when support for HAL is available.
Polynomial tables are available for 8/16 bit CCITT, 7/16 bit for SD card and
32-bit ANSI. Polynomial table implementation will be used if Hardware CRC is
not available.
In case device does not have hardware CRC and polynomial table is not supported,
CRC is still available and is computed runtime bit by bit for all data input.
2018-01-24 13:26:41 -06:00
Cruz Monrreal
98611c8578
Merge pull request #5201 from maciejbocianski/critical_section_tests
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Test set for critical section
2018-01-24 11:29:45 -06:00
Cruz Monrreal
a6892da126
Merge pull request #5903 from jeromecoutant/PR_F407_ARM
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STM32F407 : correct ARM scatter file
2018-01-24 11:28:28 -06:00
chrisyang
c0a5ffb74d
rtl8195am - restructure target files
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restructure target files to better sync with Ameba sdk base
2018-01-24 22:51:53 +08:00
bcostm
352ac7a2be
Use RawSerial in MBED_11 test
2018-01-24 14:45:18 +01:00
Clemens Mandl
1ea22c1dd6
Updated List comparision with shorter implementaion using python build-in function zip()
2018-01-24 13:49:24 +01:00
Serge Camille
63664e11b9
NXP LPC4088: Add missing SPI SSEL pin to Pinmap
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The Pin P5_3 (p31) was missing from the NXP LPC4088 SPI PinMap for SSEL.
Adding this Pin allows usage of SPISlave with SSP2 using the SSEL pin.
The pin and its SSP2_SSEL function is both documented in https://os.mbed.com/media/uploads/embeddedartists/lpc4088_qsb_pinning.xlsx as well as in UM10562 LPC408x/407x User manual Rev. 3 — 12 March 2014 chapter 7.4.1.4 Table 90 (https://www.nxp.com/docs/en/user-guide/UM10562.pdf ).
2018-01-24 13:29:43 +01:00
paul-szczepanek-arm
1cc5312d1e
octet type for keys
2018-01-24 10:22:53 +00:00
Przemyslaw Stekiel
a25bf8fbc1
Add RTC time test.
2018-01-24 10:47:34 +01:00
Maciej Bocianski
628f521919
Add tests for critical section HAL API
2018-01-24 10:14:06 +01:00
Przemyslaw Stekiel
79e730328f
Add Transaction class unit test.
2018-01-24 08:56:04 +01:00
PHST
3ce173b5ce
Simplify and Improve error/warning parser for arm_gcc
2018-01-24 08:48:15 +01:00
PHST
7719c25a99
Add missing EFM32 HAL flash init/deinit function calls
2018-01-24 08:20:38 +01:00
Michael Kaplan
b3a9af49b8
CriticalSectionLock: fixing missing include
...
Macro MBED_DEPRECATED_SINCE is defined in platform/mbed_toolchain.h which was not included.
If someone used member functions lock or unlock (which are prefixed with MBED_DEPRECATED_SINCE since some time), there would be a compile error instead of a warning.
Including mbed_toolchain.h fixes that.
2018-01-24 08:10:35 +01:00
drewcassidy
6f9aa07491
fix typos in lint.py
2018-01-23 19:19:43 -08:00
Cruz Monrreal
f1cf77fa44
Merge pull request #5844 from adustm/DiscoIot_L475_iarlink
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ST-DISCO_L475VG_IOT01A: Improve SRAM use for IAR toolchain
2018-01-23 16:23:08 -06:00
Cruz Monrreal
11b9a3d940
Merge pull request #5890 from 0xc0170/fix_renesas_nvic
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RZ_A1H: cmsis nvic include fix
2018-01-23 16:22:31 -06:00
Cruz Monrreal
8d7397884e
Merge pull request #5894 from bcostm/fix_serial_7bit
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STM32: fix serial 7bit data format
2018-01-23 16:21:00 -06:00
Cruz Monrreal
669a85affa
Merge pull request #5898 from cmonr/ncs36510-disable-rtc
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Disables RTC for NCS36510 since feature is blocking #5087 from building correctly, and issue will not be resolved soon (#5308 ).
2018-01-23 15:52:21 -06:00
Cruz Monrreal
de5c170eee
Merge pull request #5896 from jeromecoutant/PR_DEEPSLEEP
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STM32LX : HAL_RCC_OscConfig update in PLL configuration
2018-01-23 14:58:12 -06:00
Cruz Monrreal
4c07c1c830
Merge pull request #5821 from bcostm/add_BL_nucleo-f746zg
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STM32F7: Add bootloader support
2018-01-23 11:49:10 -06:00
Cruz Monrreal
892e5e1b74
Merge pull request #5809 from ashok-rao/MTB_MXChip
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Add MTB MXChip EMW3166
2018-01-23 11:33:47 -06:00
Cruz Monrreal
8e683d5f1d
Merge pull request #5864 from JaniSuonpera/CoAP_v4.0.11
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CoAP v4.1.1
2018-01-23 11:31:39 -06:00
Cruz Monrreal
eb2f4ae60b
Merge pull request #5866 from 0xc0170/fix_tickless_deepsleep
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RTX idle: sleep without locked deep sleep fix
2018-01-23 11:31:04 -06:00
Phyo Kyaw
d3ac7d3997
Updated exporter for e2 studio: added new launch file
2018-01-23 17:16:26 +00:00
paul-szczepanek-arm
38f8a5b8d5
separate live state from stored state in entry
2018-01-23 17:01:44 +00:00
paul-szczepanek-arm
8ef3311be0
naive memory implementation for verification purposes
2018-01-23 16:01:54 +00:00
paul-szczepanek-arm
c476fceba3
correct naming for private members
2018-01-23 15:36:57 +00:00