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21457 Commits (a04498c4bcbe8a3f254f94bcf3daa5a8eee7c8da)

Author SHA1 Message Date
Cruz Monrreal 945a52df1c
Merge pull request #9052 from mirelachirica/at_handler_fix_consume_to_stop_tag 
Cellular: Rewrite AT handler consume to tag
 2018-12-13 18:15:42 -06:00
Cruz Monrreal 839e00509b
Merge pull request #9054 from theamirocohen/nvstore_max_keys 
Fix max_keys reset limitation
 2018-12-13 18:15:16 -06:00
Cruz Monrreal 5e42fc0e74
Merge pull request #9057 from offirko/offir_qspif_prefer_144_mode 
Prefer QSPI Bus mode 1-4-4 as highest priority for QSPIFBlockDevice
 2018-12-13 18:15:04 -06:00
Cruz Monrreal f0a2b1dcb6
Merge pull request #9085 from u-blox/C030_PinName 
U-blox C030 PinNames Updated
 2018-12-13 18:14:52 -06:00
Cruz Monrreal 9606e3e100
Merge pull request #9087 from theamirocohen/kvstore_general_tests 
kvstore tests: reduce reset
 2018-12-13 18:14:38 -06:00
kegilbert ee3945dfa3 Add socket stat logging state change update 
TCPServer was deprecated and the accept call was added to TCPSocket. Add state change update to that call
 2018-12-13 14:50:56 -06:00
Mahesh Mahadevan 4649a6ee5f Update to add support for Cortex-M33FD 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-12-13 14:11:49 -06:00
Anna Bridge a91dccd901
Merge pull request #9072 from theotherjimmy/toggle-memory-defines 
Enable stats reporting with a flag in targets.json
 2018-12-13 15:10:46 +00:00
Kevin Bracey bd413f1d82 Disable write buffer in debug builds (M3/M4) 
As part of work to improve the debugging of exceptions, have
Mbed OS make an effort to make exceptions more precise in debug builds
at the cost of performance.

Related pyOCD work:

   https://github.com/mbedmicro/pyOCD/pull/430
 2018-12-13 16:32:38 +02:00
Kevin Bracey f04904c6e8 CM3: Make ACTLR bit definitions conditional 
The ACTLR register itself is conditional on chip revision, but its
bit definitions were always defined.

Make the the bit definitions also conditional, so it is possible to
produce portable code that sets DISDEFWBUF if available:

    #ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk
       SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk;
    #endif

(cherry-picked from CMSIS b2b04dbeece0a046556bfc320bef6b20bef3f16f)
 2018-12-13 16:31:53 +02:00
David Saada 713b4704f2 Adjust FAT FS tests to low memory boards 
This is achieved by checking whether the board can allocate a certain memory
chunk (threshold) and skipping the test if it can't.
This should prevent these boards from failing in CI.
 2018-12-13 15:26:31 +02:00
Amir Cohen 4fe7834928 Remove dead code 2018-12-13 13:34:08 +02:00
jeromecoutant 9790f67acc STM32L4 QSPI: correct register address 2018-12-13 10:56:39 +01:00
jeromecoutant 40f6d58b89 STM32 QSPI: remove QUADSPI_BK2 as dual bank feature is not supported 2018-12-13 10:56:37 +01:00
jeromecoutant fc548cdc05 STM32 QSPIF: add DISCO_L496AG, DISCO_F746NG and DISCO_F769NI 2018-12-13 10:56:36 +01:00
jeromecoutant 84ee55bfe0 QSPI tests: update STM32 boards configuration 
NB: STM directory removed in flash_configs as there is no STM memory
 2018-12-13 10:56:35 +01:00
jeromecoutant dfa902ec6c STM32 QSPI: frequency calculation update 2018-12-13 10:56:33 +01:00
jeromecoutant 5b5dcd8b26 Enable QSPI for DISCO F769 and L496 2018-12-13 10:56:33 +01:00
jeromecoutant b5bc128e36 STM32L496 : add QSPI definition 2018-12-13 10:56:31 +01:00
jeromecoutant 4a6bc96345 STM32F769 : add QSPI definition 2018-12-13 10:56:29 +01:00
jeromecoutant 0af1ecd305 STM32 DISCO : enable QSPI tests when available 2018-12-13 10:56:27 +01:00
jeromecoutant 64f8cc472c NUCLEO_F746ZG : no embedded QSPI 2018-12-13 10:56:26 +01:00
jeromecoutant 7c8de3c4e1 STM32 : removed unused QSPI pin names 2018-12-13 10:56:25 +01:00
Amir Cohen 901a493299 Improve tests by reducing kvstore reset occurrences 2018-12-13 11:47:25 +02:00
Mel W b71391040b
Editorial changes 2018-12-13 09:44:13 +02:00
Cruz Monrreal 27e1bc30dc
Merge pull request #9073 from vervaekejonathan/master 
W7500x target ADC 6 and 7 not implemented
 2018-12-12 18:46:21 -06:00
Cruz Monrreal f196942446
Merge pull request #8831 from toyowata/dev-arch_max 
[Seeed Arch MAX] Add Mbed OS 5 support
 2018-12-12 17:04:50 -06:00
Cruz Monrreal d53553e10d
Merge pull request #9034 from KariHaapalehto/enet_tasklet_definitions 
Change enet_tasklet declarations to match code
 2018-12-12 17:03:43 -06:00
Cruz Monrreal 34007bb6a2
Merge pull request #9049 from KariHaapalehto/fix_tests_netsocket_tcp 
Fix test-netsocket-tcp greentea test build fails.
 2018-12-12 17:02:23 -06:00
Cruz Monrreal fda9f2ee2a
Merge pull request #9060 from scartmell-arm/fix-duplicate-keys-in-targets-json 
Fix duplicate 'overrides' keys in targets.json config file
 2018-12-12 17:02:05 -06:00
Cruz Monrreal d8be78b84b
Merge pull request #9063 from naveenkaje/fix_fault_handler_warning 
mbed_fault_handler: fix build warning
 2018-12-12 17:01:13 -06:00
Cruz Monrreal 4e52240052
Merge pull request #9036 from c1728p9/rt1050_fix 
Disable MPU on RT1050 due to memory map
 2018-12-12 16:55:30 -06:00
test user 5de7fac91c ublox c030 pinName updated 2018-12-12 04:08:17 -12:00
vervaekejonathan 70ab75704f
Extend W7500x target with ADC 6 and 7 2018-12-12 16:23:06 +01:00
Martin Kojtal e3b03e0404
Merge pull request #9055 from 0xc0170/dev_travis_astyle_https 
travis: use https for fetching astyle package
 2018-12-12 14:46:51 +01:00
Martin Kojtal 7c5cffb78a
Merge pull request #9047 from 0xc0170/dev_travis_license 
travis: add license
 2018-12-12 14:46:32 +01:00
Martin Kojtal fa3212abee
Merge pull request #9037 from naveenkaje/fix_ble_build_warning 
BLE: Update toolchain.h with mbed_toolchain.h
 2018-12-12 14:46:17 +01:00
Martin Kojtal 7cd01266a9
Merge pull request #9035 from jeromecoutant/PR_L4TRNG 
STM32L4: correct RNG clock source
 2018-12-12 14:45:40 +01:00
Kevin Bracey 574f9fad21 nRF52840: Set mpu-rom-end to 0x1fffffff 
So we have at least one test platform exercising the special case of
mpu-rom-end being 0x1fffffff, set that for nRF52840.
 2018-12-12 15:44:22 +02:00
Martin Kojtal 45215c2ffa
Merge pull request #9008 from jeromecoutant/PR_NUCLEO_L4R5ZI_P 
Add NUCLEO_L4R5ZI_P target
 2018-12-12 14:44:22 +01:00
Kevin Bracey 02330336f2 Fix target.mpu-rom-end setting, for ARMv8-M too 
targets.json was not specifying the same macro name as the code was
checking for, so setting was ineffective.

Making this work tripped up not-supported checks in ARMv8-M - rather than deal
with making this work, support it instead.

Both ARMv7-M and ARMv8-M slightly reduce code size and runtime impact if
mpu-rom-end is 0x1fffffff, using one fewer region.

This means default setup for ARMv8-M now requires 5 regions, with
mpu-rom-end set to default 0x0fffffff, but this can be put back to 4 by
changing the setting.
 2018-12-12 15:44:21 +02:00
Martin Kojtal 93da33f151
Merge pull request #8995 from NXPmicro/Update_for_M33_FD 
Add core option for Cortex-M33 with DSP enabled
 2018-12-12 14:43:43 +01:00
Martin Kojtal 985afb8027
Merge pull request #8728 from RonEld/cryptocell_sha_alt_fixes 
Fix issues in Cryptocell 310 shax_alt discovered by On Target Testing
 2018-12-12 14:43:06 +01:00
Martin Kojtal c387fec36b
Merge pull request #8725 from ChazJin/master 
Add support for GD32F307VG
 2018-12-12 14:42:20 +01:00
Kevin Bracey 170b73442b ARMv7-M MPU: correctly protect 80000000 RAM region 
Subregion mask for this region was set fully disabled, instead of fully
enabled.
 2018-12-12 15:12:50 +02:00
Kevin Bracey 171e575b94 Assert MPU regions, rather than error 
As we build for a specific CPU, a runtime check for number of MPU
regions in release builds is not worthwhile. Make it an assert only.
Saves a little space in develop images, a lot in release.
 2018-12-12 15:12:49 +02:00
Kevin Bracey 9e300013e5 MPU - use higher-level calls, fix ARMv8-M error 
Switch to higher-level calls and macros, and fix an error in the ARMv8-M
version - "inner" attributes were not being set correctly due to a
copy/paste error - "outer" was being set twice.

This means RAM would have been marked WTRA rather than WBWA for the
inner cache.

Slightly reduces ARMv7-M init code size by feeding region number
into RBAR instead of using RNR.
 2018-12-12 15:12:49 +02:00
Amir Cohen eff52273f4 Fix max_keys reset limitation 
Persist the max_keys value through a soft-reset, also prohibit max_keys set under predefined default value (16)
 2018-12-12 15:05:09 +02:00
Mel W 8de7a36061
Capitalization and punctuation 2018-12-12 11:38:10 +02:00
offirko b79c64ec53 Favor QSPI Bus mode 1-4-4 over QPI 
QPI may have slightly better performance, but it is not supported by all targets.
It requires register setup between each Read and Program/Erase commands,
which might damage the overall performance eventually.
 2018-12-12 10:54:48 +02:00