Commit Graph

9 Commits (9ce9d1a9e7d5deee36a644041b78fe2ec7b14376)

Author SHA1 Message Date
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm ae858b4323 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-11-14 09:31:14 +01:00
bcostm 68915b7c27 STM32F0 - Add the timer type used (16b or 32b) + periph clock in hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 4c7176fc2f Replace all devices hal_tick files with a common 16b and 32b version 2016-11-14 09:31:14 +01:00
Michel Jaouen 702f64a6f2 STM32F0xx: GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-27 10:40:02 +02:00
Laurent MEUNIER 0aeea4950c [STM32] Deploy SPI_ASYNCH to all family
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.

Because of the introduction of the common file, all the above modifications
needs to be done at once.
2016-10-13 14:18:21 +02:00
bcostm 246528fe85 Add UART_RTS/CTS pins 2016-10-10 10:23:47 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00
Christopher Haster 0bad622a16 restructure - Moved targets out to top level
hal/targets -> targets
hal/targets.json -> targets/targets.json
2016-09-30 19:18:09 -05:00