mbed-os

Commit Graph

Author	SHA1	Message	Date
Jimmy Brisson	fc6c2b85ff	Upcase assembly file suffix for preprocesssing	2017-06-09 00:03:23 -05:00
Jaeden Amero	778d6822bf	RTX5: uVisor: Switch threads very carefully uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP of the target thread from the target thread's TCB. However, when interrupts of higher priority than PendSV happen between the call to uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ interrupt handler will attempt to use an invalid PSP (the PSP from before the box and thread switch). This leads to a crash. Make box and thread switching atomic by disabling interrupts immediately before the box switching until immediately after the new PSP is set.	2017-06-04 14:41:59 +01:00
Bartek Szatkowski	05548e786d	Rename directories rtx->rtx4 rtx2->rtx5	2017-05-30 18:55:55 +01:00

Author

SHA1

Message

Date

Jimmy Brisson

fc6c2b85ff

Upcase assembly file suffix for preprocesssing

2017-06-09 00:03:23 -05:00

Jaeden Amero

778d6822bf

RTX5: uVisor: Switch threads very carefully

uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP
of the target thread from the target thread's TCB. However, when
interrupts of higher priority than PendSV happen between the call to
uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ
interrupt handler will attempt to use an invalid PSP (the PSP from
before the box and thread switch). This leads to a crash. Make box and
thread switching atomic by disabling interrupts immediately before the
box switching until immediately after the new PSP is set.

2017-06-04 14:41:59 +01:00

Bartek Szatkowski

05548e786d

Rename directories rtx->rtx4 rtx2->rtx5

2017-05-30 18:55:55 +01:00

3 Commits (8998a55bc78abb8ee69635c5b25ac46813d20a07)