Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.
AT_CellularContext::do_connect() is a virtual API and therefore can be overwritten in
inherited class. The problem was that it sets AT_CellularContext::_is_connected flag but
earlier it was set as private member making it impossible to set in overwritten do_connect()
method.
This commit fixes the problem by changing _is_connected as protected enabling its use
in inherited class.
Problem Statement:
During multicast join sequence, InternetSocket::join_multicast_group() calls InternetSocket::modify_multicast_group(). modify_multicast_group() sets up the multicast group address (i.e., mreq.imr_multiaddr) to be joined and the interface address (i.e., mreq.imr_interface) to be used for the multicast join request. The interface address is initialized with the default value, which sets the version of interface address to NSAPI_UNSPEC. This results in LWIP::setsockopt() API to attempt IPv6 multicast join on the IPv4 interface address, hence IPv6 multicast join always fails with the protocol error.
Fix:
Initialize interface address version based on the multicast address version in LWIP::setsockopt(), before attempting multicast join operation.
The cyhal_spi_send api was changed to read and discard a byte on every
send operation (at the protocol level all SPI transfers are bidirectional).
This means that to achieve a truly bidirectional transfer, the
cyhal_spi_transfer API must be called (as opposed to a write followed
by a read).
Earlier changes introduced a change to default Arm C6, which does not compile the micro library which is based on Mbed 2. This change fixes the compiler version for NRF51_MICROBIT devices.
As of 722628be02, the "remainder" configuration
also uses the default location near the end of flash. Which makes the two tests
nearly identical with the exception that the "last two sectors" test correctly
handles parts with a low (possibly 1:1) erase size to program size ratio.
Therefore, change the "remainder" test to instead be a "default" test that uses
the tdb_internal_address/size values, so that it
a.) tests something meaningfully different and
b.) tests using the custom TDB address/size values if they are provided.
c.) functions correctly on devices where the default sector-based size computation
does not work (e.g. because of the low erase size to program size ratio)
and therefore a custom location and size has been specified.
The is_conf_tdb_internal variable is unused and therefore removed.
Something on Travis CI's side has changed such that invoking the 'wait' command within a script attempts to wait on some other jobs in addition to those spawned within the CI job.
Workaround is to explicitly collect the PIDs for processes spawned within the script and only wait on those.
Propagate separate alt cycle and dummy cycle counts from QSPIFBlockDevice
down to the qspi driver, so that drivers which handle the two separately have
enough information to do so.
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
Reasons to remove TRNG support:
1. M252 just has 32KiB SRAM and cannot afford mbedtls application.
2. Implementing TRNG HAL with PRNG H/W has security concern.
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:
- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
Fix logic error on replying NACK at the end of transfer.
This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.