Commit Graph

17 Commits (784c473f63db474add90bc02841073c8ea8fdea0)

Author SHA1 Message Date
jeromecoutant e438bd6dc8 STM32F3 ADC internal channels update 2018-05-22 11:42:35 +02:00
bcostm 6154fd2598 F3 ST CUBE V1.9.0: remove pcd patch
The Lock field is no more available in PCD structure.
2018-05-07 10:58:49 +02:00
bcostm d0f8def2d7 F3 ST CUBE V1.9.0 2018-05-07 10:58:49 +02:00
jeromecoutant a540a21106 STM32F3 : correct compilation warnings 2018-04-12 10:51:33 +02:00
jeromecoutant 75db24ff15 STM32F3 : compilation issue
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
2017-12-13 13:56:42 +01:00
Bartek Szatkowski c5a5438256 Update params in calls to LD/STREXW to be uint32_t 2017-11-10 09:53:42 +00:00
jeromecoutant bc40b735d4 STM32F3 : json clock source configuration
- default value is the same as before patch
- system_stm32f3xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-19 16:23:42 +02:00
Laurent MEUNIER 8576993a1a Introduce stm32_assert.h for MBED port
When we want to activate USE_FULL_ASSERT macro in STM32 CUBE, there is a
need to have the assert map to MBED.

The easiest way to have this definition in a single place for all STM32
HAL and LL files using it, is to add a specific header file where the
porting to MBED is done.
2017-05-29 13:48:29 +02:00
Jimmy Brisson 6aca976433 Merge pull request #4149 from monkiineko/master
STM32F3: Correct handling of USB ISTR and endpoint registers
2017-05-08 11:16:31 -05:00
Laurent MEUNIER 4eea8fa863 STM32 Fixed warning related to __packed redefinition
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0:  #3135-D: attribute does not apply to any entity

This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.

This is solve by adding a extra check on __CCARM .
2017-04-27 10:32:00 +02:00
Bradley Scott 7f12ad2a8c STM32F3: Correct handling of USB ISTR and endpoint registers
The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits.  As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.

Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write.  These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
2017-04-26 10:23:02 -04:00
Laurent MEUNIER 9640936714 F3 CUBE update V1.7.0
CMSIS v2.3.0 => v2.3.1
    HAL   v1.3.0 => v1.4.0
    LL    v1.4.0
2017-01-23 16:44:21 +01:00
Anna Bridge a915fa86e4 Merge pull request #3390 from jeromecoutant/PR_ST_F3_ASSERT
STM32F3 : map ST HAL assert into MBED assert
2016-12-19 17:24:26 +00:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
2016-11-30 08:23:13 +01:00
Michel Jaouen 182c311fbd TARGET_STM : USB FS STM HAL changes 2016-11-09 12:08:45 +01:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00