- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
(default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
As of 722628be02, the "remainder" configuration
also uses the default location near the end of flash. Which makes the two tests
nearly identical with the exception that the "last two sectors" test correctly
handles parts with a low (possibly 1:1) erase size to program size ratio.
Therefore, change the "remainder" test to instead be a "default" test that uses
the tdb_internal_address/size values, so that it
a.) tests something meaningfully different and
b.) tests using the custom TDB address/size values if they are provided.
c.) functions correctly on devices where the default sector-based size computation
does not work (e.g. because of the low erase size to program size ratio)
and therefore a custom location and size has been specified.
The is_conf_tdb_internal variable is unused and therefore removed.
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
Return value was ignored, and TDBStore:init() ended up in a
MBED_ERROR() phase after that.
TDBStore API was limited to allow returning of only two separate
errors, which may end up hiding the actual return value. Change
the documentation slightly to allow returning of original error
code from the underlying block device.
Fixes#11591
The default computation assumes that a flash sector is several times
larger than a flash page. On PSoC 6 targets this is not the case
(the two values are the same) so the computed size is too small.
This is a similar change to 1b1f14d36b,
but for devices which implement TDB in internal storage.
When flashing a binary STLink won't skip writing padding which happens
to be the same value as flash's erase value. STM32L4 based targets
have an additional 8-bit of embedded ECC for each 64-bit word of data.
The initial value, when a sector is erased, for the ECC bits is 0xFF.
When you write the erase value to a given address these bits gets
modified to something different due to the ECC algoritm in use. The
visible bits are intact but difference in ECC value prevents flipping
any 1's to 0's. Only way to proceed is to erase the whole sector.
The default computation assumes that a flash sector is several times
larger than a flash page. On PSoC 6 targets this is not the case
(the two values are the same) so the computed size is too small.
This could cause incomplete data retrieval and mismatch when reading
data in more than one chunk, because every chunk would be read to the
same location at the beginning of the output buffer.
IAR compilation fails at `_fs = { 0 };` due to
```
[Error] FATFileSystem.cpp@285,0: [Pe029]: expected an expression
```
Changing that object initializer list instead, as that seems
to pass IAR compilation, too.
Changed original memset to object initialiser list based on review
feedback from Kevin Bracey.
To compile Mbed Bootloader with bare metal profile certain defines are
not added anymore automatically. Because of this checks for those
defines needed to be introduced.
Thus far the default position has been after the application plus two
spare sectors. For simplicity and to have a predictable location for the
TDBStore with the default configuration the location is now switched to
the end of the flash. Two last sectors to be exact.
Macro which restricted compilation to GCC_ARM is removed.
Existing read_write() test is amended to call stat() and check that correct size is returned.
- Add the no confidentiality & no replay protection flags
- Add actual size parameter in PS/ITS get APIs
- Change a few size parameters from uint32_t to size_t