All MBED_SPM targets have been removed previously, via commits
5cc66282dd ("PSOC6: remove PSA targets") and 115b09aba43b ("psoc6:
Remove FUTURE_SEQUANA and FUTURE_SEQUANA_M0"). Remove all the dead
MBED_SPM code, as no targets use it.
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
Some non-Mbed-OS, pre-existing CMSIS-RTOSv2 applications depend on
CMSIS-RTOSv2 Automatic Dynamic Allocation, also known as Object-specific
memory pools. Mbed OS doesn't by default provide any memory to the
CMSIS-RTOSv2 Automatic Dynamic Allocation pool, as doing so would waste
memory if the feature is not used; even if the feature is used, as a
platform, Mbed OS can't know how many objects of which types will be
created by an application and therefore will either waste memory or not
provide enough memory in a hard to debug manner. Portable CMSIS-RTOSv2
applications depending on CMSIS-RTOSv2 Automatic Dynamic Allocation
should instead configure the memory pools themselves, as applications
know best their memory requirements.
Add Mbed configuration options which can be used by applications to
control the amounts of memory available to the CMSIS-RTOSv2 Automatic
Dynamic Allocation subsystem. This enables portable CMSIS-RTOSv2
applications, which can run on any CMSIS-RTOSv2 OS, to be able to run on
Mbed OS as well.
RTX's configuration options for CMSIS-RTOSv2 memory are documented at
http://www.keil.com/pack/doc/CMSIS_Dev/RTOS2/html/config_rtx5.html
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
These changes are for TFM_DUALCPU and TFM_V8M platforms.
The initialization happens after mbed-os kernel is kicked off and
when the thread is up and running.
We are initializing the following for TFM_DUALCPU platforms:
* IPC Interrupts for syncing multi-core platforms.
* NS Mailbox to receive messages.
* NS interface.
We are only initializing Non-secure interface for TFM_V8M platforms.
mbed_tfm_init() in tfm_mbed_boot.c overrides the WEAK mbed_tfm_init()
for a specific platform.
Signed-off-by: Vikas Katariya <vikas.katariya@arm.com>
Following IAR guide for RAM vector table, this is in the code snippet there:
```
extern void * __vector_RAM_table [];
void main(void)
```
Found in https://github.com/ARMmbed/mbed-os/pull/12547
In mbed_start_application() there was a code that was supposed to
set DISDEFWBUF to one when running a debug build. However, this code
was in the wrong place, as this function is only called from
bootloader.
Move the code to correct place so that standalone applications use it
as well.
For the reference of DISDEFWBUF bit, see
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/CHDCBHEE.html
- By default, Mbed OS build tools use standard C library for all supported toolchains.
It is possible to use smaller C libraries by overriding the "target.default_lib" option
with "small". This option is only currently supported for the GCC_ARM toolchain.
This override config option is now extended in the build tool for ARM toolchain.
- Add configuration option to specify libraries supported for each toolchain per targets.
- Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
- Use 2 memory region model for ARM toolchain scatter file for the following targets:
NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
- Add a warning message in the build tools to deprecate uARM toolchain.
- NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
format specifier so skipping those green tea test cases.
The ARMC6 compiler inadvertently introduces the `_scanf_mbtowc` symbol
to the build. The commit provides a weak definition of the symbol to
satisfy the linker whenever the symbol is included. This affects ARM
Compiler 6 version 6.12 and earlier.
The compiler error was previously observed when the MICROLIB library is
used with the uARM toolchain. However, the weak definition was put in
`mbed-os/rtos` which is not included when the bare metal profile is used.
Remove checking that vectors were copied to RAM as not all targets
have NVIC_RAM_VECTOR_ADDRESS defined as public. Instead always
call NVIC_SetVector unconditionally as old implementation does.
When a Doxygen group has been defined (created), all its needed to add
documentation to that group is `\addtogroup`. Since all the information
about the group is preserved, it is not necessary to mention the group
hierarchy again with `\ingroup`. This PR removes unnecessary Doxygen lines
across the `drivers`, `events`, `platform` and `rtos` directories.
It also ensures that new groups are created with `\defgroup` once and
referenced with `\addtogroup` whenever documentation needs to be added to
an existing group.
The stack memory is a `void*` which creates a warning when using
the `delete[]` operator because it is unable to call the destructor of
of an unknown object type.
* Change Doxygen groups structure, splitting first by Public/Internal
This commit also does the following:
* groups the documentation of related API
* moves `events/internal/equeue.h` to `events/equeue.h`
* merges `events/source/README.md` to `events/README.md`
Separate drivers, events, and rtos internal APIs from public APIs.
* Move source files to source subdirs
* Move internal headers to internal subdirs
* Add Doxygen comments for documenting internal and public APIs
* Remove source code from header files in order to remove include pre-processor directives
that included header files not directly used by said header files
* Explicitly include header files instead of implicit inclusions via third-party header files.
Release Notes
This will break user code that was using an internal API as the internal header files have been moved.
This will only break if the user was including the header file using a namespace (i.e #include "foo/bar.h" instead of #include "bar.h"
Provide partial RTOS API for bare metal builds - things that
can be done in a single threaded environment.
Allows more code to work in both RTOS and bare metal builds without
change, and in particular gives easy access to the ability to
efficiently wait for something occurring in interrupt.
Available in bare-metal:
* ThisThread
* osThreadFlagsSet to set flags on main thread (can be set from IRQ)
* EventFlags (can be set from IRQ)
* Semaphores (can be released from IRQ)
* Mutex (dummy implementation)
Not useful:
* ConditionVariable (could only be signalled from 2nd thread)
* RtosTimer (calls in a second thread context)
* Thread
Unimplemented:
* Mail, Queue, MemoryPool
Possible future work:
* ConditionVariableCS to act as IRQ signalled ConditionVariable
Replace the hardcoded value calculation of the memory pool block size
with the RTX preprocessor macro (via a shim layer).
This is in preparation for the replacement of the direct access of RTX
functionalities in Mbed OS with an access via CMSIS.
In rtos/mbed_lib.json:
Enlarge idle-thread-stack-size-debug-extra for all Nuvoton targets.
In rtos/TARGET_CORTEX/mbed_rtx_conf.h:
MBED_DEBUG also must be defined for this configuration parameter to take effect.
As the timer code became more generic, coping with initialization on
demand, and variable width and speed us_ticker_api implementations,
wait_us has gradually gotten slower and slower.
Some platforms have reportedly seen overhead of wait_us() increase from
10µs to 30µs. These changes should fully reverse that drop, and even
make it better than ever.
Add fast paths for platforms that provide compile-time information about
us_ticker. Speed and code size is improved further if:
* Timer has >= 2^32 microsecond range, or better still is 32-bit 1MHz.
* Platform implements us_ticker_read() as a macro
* Timer is initialised at boot, rather than first use
The latter initialisation option is the default for STM, as this has
always been the case.
Building binaries with MicroLib and Arm compiler 6 has been failing
because of a bug in Arm compiler 6. The compiler introduces a
symbol, `__scanf_mbtowc`, which is not present in MicroLib C library.
The present commit adds a weak reference to the symbol to allow a
successful linkage. This is a temporary fix until the bug in the
compiler is fixed. It should be removed after the compiler bug is fixed.
Deprecate wait() in favour of acquire(), try_acquire(),
try_acquire_for() and try_acquire_until().
Brings Semaphore more into line with CMSIS-RTOS 2 (which uses "acquire"),
itself (as it has "release"), and other classes having "try", "try for"
and "try until".
Also steps away from vague "wait" term - the primary operation here is
to acquire the semaphore, and this will of course sleep.
Once a fatal error is in progress, it's not useful to trap RTX errors
or mutex problems, so short-circuit the checks.
This makes it more likely that we may be able to get the console
initialised if it is being written to for the first time by `mbed_error`
in a difficult context - such as an RTX error callback from inside an
SVCall.
For example, the one-line program
osMutexAcquire(NULL, 0);
will generate an RTX error trap, then `mbed_error` will try to call
`write(STDERR_FILENO)` to print the error, which will prompt mbed_retarget to
construct a singleton `UARTSerial`. This would trap in the mutex
for the singleton or the construction of the UARTSerial itself, if
we didn't allow this leniency. If we clear the mutex checks, then
`UARTSerial::write_unbuffered` will work.
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.
1. Patch RTX so irq_cm4f.S files work with no FPU targets
2. Patch RTX so irq_armv8mml.S files to work with and without FPU
2. Patch RTX so irq_armv8mml.S and irq_armv8mbl.S files to work with secure and
non-secure builds
(cherry picked from commit 094662790a)
In case of ARM compiler, idle and timer thread stack though assigned
to `.bss.os` section since not zero initialized are part of `data` section.
In this commit, we are moving stacks of idle and timer thread to bss
section and thereby saving ROM space.
(cherry picked from commit ba92372b8d)
mbed OS used older RTX4 version and with osThreadDef accepting only 3
parameters, to preserve compatibility we hardcode the 'instances'
parameter to 1.
(cherry picked from commit 428acae1b2ac15c3ad523e8d40755a9301220822)
(cherry picked from commit 4360b7bbf8)
For single-threaded apps __iar_Initlocks() is not required and must
not be called because the proper IAR library is brought in only if
"--threaded_lib" is defined in the linker command.
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
Assembler in rtx_core_ca.h is on the whole unified syntax such that it
should work fine if assembled as either ARM or Thumb-2.
The exception was __get_PSP, which uses STM^, which is only available
in ARM state.
Flagging for this function was incorrect, except for IAR - it switched
assembler state without telling the compiler, meaning that the resulting
assembler output could be incorrect, and that the function itself would
not be correctly marked as an ARM function - the CPU would enter in
Thumb state.
Alternative fix would be to switch to System mode, which would work
as either ARM or Thumb-2 assembler, like the rest of the file, but
this is the minimal change.
Fixes#526.
Optimize the tick computation in the following ways:
1. Use relative time rather than absolute time
2. Replace multiplication/division pair with just multiplication
or division:
"* 1000000ULL / OS_TICK_FREQ" -> "* US_IN_TICK"
"* OS_TICK_FREQ / 1000000" -> "/ US_IN_TICK"
The low power ticker wrapper layer adds a large amount of interrupt
latency. This can cause dropped bytes at a baud of 115200 on some
devices. To prevent this by default use the microsecond ticker for
tickless on devices which make use of the low power ticker wrapper.
Matches rest of RTOS class timeout parameters by using the unit name. Remove ambigious statement in reference to 0 ms being no-timeout as a timeout of 0 causes the function to not block and return immediately (osWaitForever is used as no timeout as it will wait forever)
Memory model for RTOS and No RTOS was initially single stack and heap,
only few targets implemented 2-region RAM model.
2-region RAM model is applied for all toolchains and targets.
GCC: __wrap__sbrk was implemented for 2-region ram model, with switch to 2-region
for all targets, we do not need target specific implementation of this API
Also _sbrk is WEAK function, hence can be over written in target folder for
special cases
Earlier if interrupt stack is specified it was used and remaining section of
IRAM was used to allocate heap, if stack is not specified heap section was
reduced by isr stack size and it was added at the end of RAM
With 2-region RAM support interrupt stack will always be specified.
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.
1. Patch RTX so irq_cm4f.S files work with no FPU targets
2. Patch RTX so irq_armv8mml.S files to work with and without FPU
2. Patch RTX so irq_armv8mml.S and irq_armv8mbl.S files to work with secure and
non-secure builds
1. Revert "CMSIS/RTX: __FPU_USED to be set based on HW FPU support"
This reverts commit b4f5bed7e75c21927c954a50d40422b81a1de5a0.
2. Revert "CMSIS/RTX: Update Armv8M IAR 8.x assembly files - add END"
This reverts commit b228cd9db0.
3. Revert "CMSIS/RTX: Pre-processor defines used for assembly"
This reverts commit 287121ffdc.
4. Revert "CMSIS/RTX: Patch RTX so irq_cm4f.s files work with no FPU targets"
This reverts commit cc2e0517e1.
In case of ARM compiler, idle and timer thread stack though assigned
to `.bss.os` section since not zero initialized are part of `data` section.
In this commit, we are moving stacks of idle and timer thread to bss
section and thereby saving ROM space.
Main thread in Mbed OS is statically allocated and was not available in call
stack of Keil MDK. The RTX5 kernel requires statically allocated thread
information objects that are placed into a specific section to enable RTOS
thread awareness in Keil MDK. This fix is to keep main thread in specific
section of memory.
Add missing END to the IAR assembly files. In future this commit should be
merged to other assembly file commit, when performing CMSIS update.
287121ffdc
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
Make the option positively named, and as it is a platform config
option make sure it only affects platform code.
HAL functions still remain available even if platform is told not
to use them.
Make the following changes:
-Allow a vector specific ARM MPU driver by defining MBED_MPU_CUSTOM
-Allow ROM address to be configured for ARMv7-M devices by
setting the define MBED_MPU_ROM_END
-Add ROM write protection
-Add new functions and lock
-enable at boot
-disable during flash programming
Enable the MPU as part of the boot sequence and disable it before
starting a new application. Also add reference counted MPU lock and
unlock functions to allow code to execute from ram when necessary.
Martin Kojtal
Rajkumar Kanagaraj
Jaeden Amero
Devaraj Ranganna
Vikas Katariya
Evelyne Donnaes
Anna Bridge
Seppo Takalo
Kevin Bracey
jeromecoutant
Ari Parkkila
Hugues Kamba
Maciej Bocianski
George Psimenos
Dominika Maziec
Yogesh Pande
int_szyk
Laurent Meunier
Chun-Chieh Li
Lingkai Dong
George Beckstein
Oren Cohen
Martin Kojtal
Cruz Monrreal
Bartek Szatkowski
deepikabhavnani
RFulchiero
d-kato
Russ Butler
kegilbert
Oren Cohen
Przemyslaw Stekiel
Antti Kauppila
Alastair D'Silva
Marc Emmers
Senthil Ramakrishnan