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419 Commits (72ccf0b2b51dfd33c939d3ebecdb0bf72a8cde68)

Author SHA1 Message Date
adustm c596cdad36 STM32F334x8 folder struct 2017-01-27 19:38:26 +01:00
adustm 703386d443 STM32F303xC folder struct 2017-01-27 19:30:27 +01:00
adustm 6970de6df7 STM32F303x8 folder struct 2017-01-27 19:27:24 +01:00
adustm c30813955f STM32F303xE folder structure modification 2017-01-27 18:36:49 +01:00
adustm 885515acc9 STM32L432xC folder structure rework 2017-01-27 17:41:59 +01:00
adustm 389d9ba358 STM32L476xG STM32L486xG folder structure modification 2017-01-27 17:35:27 +01:00
Laurent MEUNIER b63ca7eee2 Fix alignements 2017-01-27 16:00:39 +01:00
adustm a9ef00231c STM32F410xB folder structure update 2017-01-27 15:41:49 +01:00
adustm 00f80b0abe STM32F401xE folder structure update 2017-01-27 15:41:49 +01:00
adustm 2a4ef3f464 STM32F469xI folder structure update 2017-01-27 15:41:49 +01:00
adustm 0883430bba STM32F412xG folder structure update 2017-01-27 15:41:49 +01:00
adustm 5c3bf54928 STM32F407xG folder structure update 2017-01-27 15:41:49 +01:00
adustm 756aaf6dfd STM32F401xC folder structure update 2017-01-27 15:41:49 +01:00
adustm dd7c00f1b6 STM32F429 / F439 folder rework 2017-01-27 15:41:49 +01:00
adustm 62433aba36 STM32F411xE folder structure update 2017-01-27 15:41:49 +01:00
adustm 43f508947d STM32F446xE folder structure update 2017-01-27 15:41:49 +01:00
adustm 0e70959e4d Modify forder structure so that targets with the same device can share 
files
 2017-01-26 14:21:26 +01:00
Martin Kojtal ade6722707 Merge pull request #3607 from ARMmbed/feature_hal_sleep 
Platform: Add sleep/deepsleep user facing functions
 2017-01-26 13:55:33 +02:00
Martin Kojtal f231655619 Merge pull request #3635 from bcostm/fix_i2c 
STM32 I2C : Fix bug in i2c_byte_read function
 2017-01-26 10:39:03 +02:00
Martin Kojtal 5d09014bf1 Merge pull request #3631 from LMESTM/dev_stm32_hal_F3_V1.7.0 
F3 CUBE update V1.7.0
 2017-01-26 10:37:49 +02:00
Martin Kojtal bdcda386d5 Merge pull request #3618 from LMESTM/dev_stm32_PinNamesTypes 
STM32: Move types definitions to a common file
 2017-01-26 10:35:59 +02:00
bcostm c1f712872d Fix bug in i2c_byte_read function 2017-01-24 16:50:55 +01:00
Laurent MEUNIER 42f6622f8e STM32: Move types definitions to a common file 
Only one point of attention:
STM_MODE_ANALOG_ADC_CONTROL is a specific mode that is only supported on L4.
So STM_MODE_ANALOG_ADC_CONTROL was moved to index 13 (last entry)
of gpio_mode table so that all the other modes are common and only the last
one is specific.
 2017-01-24 10:58:36 +01:00
Laurent MEUNIER 32d04ead8a STM32: L0 LL layer 
Introduce the L0 LL Layer from STM32 cube.
 2017-01-23 18:01:30 +01:00
Laurent MEUNIER 1b94e234e3 STM32: I2C: remove warning 
Remove unused variables to avoid warnings.
 2017-01-23 17:07:52 +01:00
Laurent MEUNIER c6a898d71b STM32: remove F3 spi_api.c warning 
Solve below warning:

"...\targets\TARGET_STM\TARGET_STM32F3\spi_api.c", line 73:
Warning:  #111-D: statement is unreachable
 2017-01-23 17:07:46 +01:00
Laurent MEUNIER 9640936714 F3 CUBE update V1.7.0 
CMSIS v2.3.0 => v2.3.1
    HAL   v1.3.0 => v1.4.0
    LL    v1.4.0
 2017-01-23 16:44:21 +01:00
Laurent MEUNIER 5d04b97b80 STM32: make PortNames.h a common file 
the same file can be used for all targets
 2017-01-19 15:27:19 +01:00
Bartek Szatkowski 6a045a49a9 Platform: Add sleep/deepsleep user facing functions 
Add sleep/deepsleep functions to platform layer which are replacing HAL
functions with the same name, rename existing symbols in HAL layer
to hal_sleep/hal_deepsleep. This way sleep functions
are always available, even if target doesn't implement them, which makes
the code using sleep clearer. It also enables us to make decision on in
which builds (debug/release) the sleep will be enabled.
 2017-01-19 09:39:29 +00:00
Martin Kojtal e592c8a8b2 Merge pull request #3571 from jeromecoutant/PR_DISCO_F769NI 
DISCO_F769NI introduction
 2017-01-16 16:38:20 +00:00
Martin Kojtal e184511079 Merge pull request #3583 from jeromecoutant/PR_F7_CUBE_151 
STM32F7 Cube FW new release v1.5.1
 2017-01-16 16:34:35 +00:00
Martin Kojtal 3933ccf76e Merge pull request #3584 from LMESTM/dev_stm32_common_peripheralpins 
STM32: make PeripheralPins.h a common file
 2017-01-16 16:29:28 +00:00
Martin Kojtal cc8a132f10 Merge pull request #3575 from LMESTM/dev_stm_factorize_gpio 
Dev stm factorize gpio
 2017-01-16 16:28:27 +00:00
Martin Kojtal c14d7154e6 Merge pull request #3397 from AlessandroA/stm32f4_support 
Add uVisor support for the DISCO_F429ZI
 2017-01-16 16:24:33 +00:00
Anna Bridge 469b54700b Merge pull request #3577 from bridadan/fix_debug_build_stm 
Fixes linking errors when building with debug profile
 2017-01-13 14:15:37 +00:00
jeromecoutant f5b62208f4 STM32Cube_FW_F7_V1.5.1 
CMSIS v1.1.0 => v1.1.2
    STM32F7 HAL v1.1.0 => v1.1.2
 2017-01-13 13:29:45 +01:00
Laurent MEUNIER 1a4394a4a2 STM32: make PeripheralPins.h a common file 
Simple effort to avoid duplicate code.
 2017-01-13 13:25:33 +01:00
Anna Bridge 74f192add5 Merge pull request #3567 from LMESTM/dev_stm32_hal_F0_V1.7.0 
Dev stm32 F0 v1.7.0
 2017-01-13 10:52:49 +00:00
Brian Daniels 24a9a4824f Fixes linking errors when building with debug profile 
When building with the debug profile, certain ST plaforms error with
'get_i2c_timing' not being defined. This is because the function is not
defined as 'static inline', but just 'inline'.
 2017-01-12 15:09:28 -06:00
Laurent MEUNIER 57e0225248 STM32: gpio: factorize gpio_api.c and gpio_object.h 
Let's make the code more common for gpios.

The only difference between STM32 families is that BRR register may
not be available. In case BRR is not available, we use the 16 left bits
of BSRR instead. We could always use BSRR, but BRR saves one left-shift
operation, so let's use it when available.

By default we will consider using BRR, except for platforms that define
GPIO_IP_WITHOUT_BRR.
 2017-01-12 19:24:32 +01:00
Laurent MEUNIER 7a36614e74 STM32: remove useless include 
gpio_object.h is included from common_objects.h,
so no need to have it here.
 2017-01-12 19:11:36 +01:00
Anna Bridge 236258bf05 Merge pull request #3546 from bcostm/dev_can_nucleo-f412zg 
NUCLEO-F412ZG - Add CAN peripheral
 2017-01-12 16:04:40 +00:00
Anna Bridge 63601df8dd Merge pull request #3544 from jeromecoutant/PR_DEEPSLEEP_L4 
STM32L4 deepsleep improvement
 2017-01-12 16:02:40 +00:00
jeromecoutant 2ea49e0bc1 DISCO_F769NI: targets update 
- correct clock for USB
- add ARM micro support
- add OS5 release support
- add TRNG support
- add ARDUINO form factor support
 2017-01-12 15:36:30 +01:00
Laurent MEUNIER b15fc6a6b5 STM32: TIM: Initialize new TIM parameter 2017-01-10 16:53:20 +01:00
Laurent MEUNIER cdcaf2a473 STM32: Serial: Use up to date MACROs 
Following STM32 HAL update, it is needed to use up-to-date MACROs.
Otherwise, build would fail.
 2017-01-10 16:53:17 +01:00
Laurent MEUNIER 0ca04ffb3e STM32: HAL update, use I2C function instead of MACRO 
Following HAL update, this is needed to use the I2C API function
rather than previously used MACRO.

An assert would fail at compilation time otherwise.
 2017-01-10 16:53:15 +01:00
Laurent MEUNIER af6cdabc28 STM32Cube_FW_F0_V1.7.0 
CMSIS v2.3.0 => v2.3.1
    STM32F0 HAL v1.4.0 => v1.5.0
    LL Layer introduction for STM32F0
 2017-01-10 16:50:35 +01:00
adustm 3a53a5adc8 DISCO_F429ZI: Add support for uVisor 2017-01-10 13:15:54 +00:00
bcostm 31e6e5c182 Add CAN object structure 2017-01-10 11:15:38 +01:00
Sam Grove 4f9e9f635f Merge pull request #3540 from LMESTM/fix_spi_rx_init 
STM: SPI: Initialize Rx in spi_master_write
 2017-01-09 10:37:05 -06:00
Sam Grove 5fd8a5e43a Merge pull request #3539 from bcostm/dev_trng_nucleo-f412zg 
NUCLEO_F412ZG - Add support of TRNG peripheral
 2017-01-09 10:34:18 -06:00
Sam Grove cefae22703 Merge pull request #3492 from Nodraak/fix/3463/can_read_return_value 
Fix #3463 CAN read() return value
 2017-01-09 10:17:27 -06:00
Sam Grove ddcd3ad711 Merge pull request #3488 from LMESTM/dev_stm_i2c_v2_unitary_functions 
Dev stm i2c v2 unitary functions
 2017-01-09 10:15:55 -06:00
jeromecoutant 633240b93b STM32L4 deepsleep improvement 2017-01-09 12:21:24 +01:00
Laurent MEUNIER fd3a3f9de8 STM: SPI: Initialize Rx in spi_master_write 
In case Rx is not initiliased its content might be random from stack.
This is causing problem in case of 8 bits read only as the left-side 8 bits
of the returned int value may contain this random byte data. This was for
instance detected when using SDFileSystem Lib.
 2017-01-06 13:20:55 +01:00
bcostm 30ac4aae75 Add support of TRNG peripheral 2017-01-06 10:36:29 +01:00
Laurent MEUNIER 4297e3fd36 STM32: I2C: i2c_byte_read return value in case of error 
To make clear that an error is being reported, we shall report -1,
2 being the timeout error for i2c_byte_write only.
 2017-01-03 18:06:19 +01:00
Adrien Chardon 885b018f77
Set bit without reseting the whole register 2017-01-03 11:46:27 +01:00
Adrien Chardon 7e0b4fe3c9
Fix can_read() return value for STM32 boards 2017-01-03 11:46:25 +01:00
Laurent MEUNIER 455c2ecbea STM32: I2C: remove debug code 
Few debug lines were to be removed / updated.
Move the printf to DEBUG_PRINTF and return the error when needed.
 2017-01-03 10:18:56 +01:00
Michel Jaouen 8af69dcbd6 STM32 HAL HCD : USBHOST changes for f4,f2,l4,f7 
- reset toggle_out , toggle_in at init
-  in/out toggle in on ctrl endpoint
- remove call back when transmission restarted
 2017-01-02 09:48:15 +01:00
Martin Kojtal 6598e32785 Merge pull request #3405 from samos2011/stm32f1_can_bug 
Repair the transmit mailbox (0,1,2) empty interrupt flag not clear BUG
 2016-12-30 12:31:18 +01:00
Martin Kojtal 6e7ee0e51e Merge pull request #3489 from bcostm/fix_issue_3474 
NUCLEO_F103RB - Correct CAN and PWM alternate-functions
 2016-12-23 13:15:37 +00:00
Martin Kojtal d652d391e6 Merge pull request #3454 from 0xc0170/jeromecoutant-PR_LPT 
STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files
 2016-12-23 13:06:02 +00:00
Martin Kojtal 9b8efb2659 Merge pull request #3391 from jeromecoutant/PR_ST_F4_ASSERT 
STM32F4 : map ST HAL assert into MBED assert
 2016-12-23 13:05:35 +00:00
jeromecoutant 2b4d83ef1e Run astyle 2016-12-21 16:54:19 +00:00
jeromecoutant ab28a5e5cb STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files 2016-12-21 16:54:18 +00:00
bcostm 30dddf115a Correct wrong alternate-function number for CAN PB_8/PB_9 pins and PWM PC_7 pin 2016-12-21 10:27:50 +01:00
Laurent MEUNIER 20c9af8bec STM32: I2C unitary functions for IP V2 
STM32 supported targets have 2 possible versions of I2C.
This patch makes the start / stop / read and write byte work ok for IP V2.
This was not working before and does not seem to be widely used.
 2016-12-21 09:27:52 +01:00
Anna Bridge f2ce7ebb99 Merge pull request #3442 from LMESTM/dev_stm_i2c_f1 
Dev stm i2c f1
 2016-12-19 17:51:58 +00:00
Anna Bridge 9e03765d04 Merge pull request #3422 from szechyjs/disco_f303vc_can 
Enable CAN on DISCO_F303VC
 2016-12-19 17:37:48 +00:00
Anna Bridge d1aa6eea52 Merge pull request #3410 from jeromecoutant/PR_ST_L4_ASSERT 
STM32L4 : map ST HAL assert into MBED assert
 2016-12-19 17:33:13 +00:00
Anna Bridge a915fa86e4 Merge pull request #3390 from jeromecoutant/PR_ST_F3_ASSERT 
STM32F3 : map ST HAL assert into MBED assert
 2016-12-19 17:24:26 +00:00
Anna Bridge 42389c1420 Merge pull request #3389 from jeromecoutant/PR_ST_F2_ASSERT 
STM32F2 : map ST HAL assert into MBED assert
 2016-12-19 17:23:37 +00:00
Anna Bridge 89190fd794 Merge pull request #3381 from jeromecoutant/PR_ST_F1_ASSERT 
STM32F1 : map ST HAL assert into MBED assert
 2016-12-19 17:22:54 +00:00
Laurent MEUNIER 580d96431e STM32 I2C manage STOP specific case 
In case the user applicaiton makes a mixed usage of unitary function
(start, stop, byte write & read) with SYNC operation (write and read of
data buffers with start and stop management), we need to reset the
STM32 HAL state as it is by-passed by a direct call to STOP
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER 8406a99dc8 STM32 I2C: avoid timeout to be 0 
In continuation of previous IsDeviceReady case, let's
add 1 in case length is 0 (even though not recommended)
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER 37c94a03f0 STM I2C: manage Is Device Ready case 
Some device drivers use a data lenght of 0 to check if device is ready.
STM32 HAL provides a dedicated service for that, so let's use it.
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER c0ca0a7e2c STM I2C - move i2c_read in SYNC part 
just change the place of code to have i2c_read and i2c_write together
 2016-12-16 08:54:39 +01:00
Sam Grove 19acef97ee Merge pull request #3429 from LMESTM/fix_stm_i2c_fix_init 
Fix stm i2c fix init
 2016-12-15 10:35:13 -06:00
Sam Grove 45fa92dcb3 Merge pull request #3427 from LMESTM/fix_stm_i2c_slave 
Fix stm i2c slave
 2016-12-15 10:33:06 -06:00
Sam Grove cf75543cfa Merge pull request #3424 from bcostm/fix_dma_f4 
STM32F4 - FIX to add the update of hdma->State variable
 2016-12-15 10:32:22 -06:00
Sam Grove 4524c5f917 Merge pull request #3411 from jeromecoutant/PR_ST_L0_ASSERT 
STM32L0 : map ST HAL assert into MBED assert
 2016-12-15 10:30:03 -06:00
Sam Grove 4c2b84a865 Merge pull request #3408 from jeromecoutant/PR_ST_F7_ASSERT 
STM32F7 : map ST HAL assert into MBED assert
 2016-12-15 10:29:34 -06:00
Sam Grove ea555e68a1 Merge pull request #3393 from andreaslarssonublox/ublox_fix_isr_reg_reeval 
ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4
 2016-12-15 10:28:30 -06:00
Sam Grove 0a40444b76 Merge pull request #3379 from jeromecoutant/PR_ST_F0_ASSERT 
STM32F0 : map ST HAL assert into MBED assert
 2016-12-15 10:25:09 -06:00
Sam Grove 38411e917f Merge pull request #3366 from bcostm/dev_nucleo_f412zg 
NUCLEO_F412ZG - Add new platform
 2016-12-15 10:19:51 -06:00
jeromecoutant e1f4d69109 STM32L0 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- ADC: a parameter setting was missing
- GPIO: mode was not allowed by ST HAL API
- tick: init value was too high for 16b
 2016-12-14 11:10:03 +01:00
jeromecoutant 2c5249b196 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-14 11:09:32 +01:00
jeromecoutant dd88e97e0b STM32F4 : correct ST HAL API call 
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-14 10:03:02 +01:00
Laurent MEUNIER 57eb4a0d1d STM32 F1: move F1 to I2C common code 
Now that F1 HAL has been updated to support required APIs,
the F1 family can also be moved to common code.
 2016-12-14 08:36:30 +01:00
Laurent MEUNIER e7cab5c8dc [STM32] HAL F1: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
 2016-12-14 08:35:32 +01:00
Laurent MEUNIER f88803b7fe STM32 F1 HAL V1.0.5 
This is a partial update of HAL drivers, especially for I2C driver update
 2016-12-14 08:35:12 +01:00
Sam Lin d4c18b0058 Use __HAL_CAN_CLEAR_FLAG macro clear TSR . 
Redress stm32f1xx_hal_can.h header file comment
 2016-12-14 08:42:55 +08:00
Jared Szechy f941960d1c
Add alternative CAN pins to DISCO_F303VC 2016-12-13 11:20:22 -05:00
Laurent MEUNIER 77e202f064 STM32 I2C: use higher IRQ priority for slave vs. master 2016-12-13 11:59:12 +01:00
Laurent MEUNIER 36a0365d2d STM32 I2C: differentiate HW reset and driver reset 
Make a distinct i2c_reset function as defined in MBED HAL api,
from the i2C_hw_reset which simply drives the HW reset signals
 2016-12-12 17:33:14 +01:00
Laurent MEUNIER 6cdac88a1c SMT32 I2C: initialize clock before configuring PINs 
This is needed especially for F1 family but can apply to all.
 2016-12-12 14:52:11 +01:00
Laurent MEUNIER ee9c8acbe4 STM32 I2C: Initialize hz parameter before reset 
The hz value is used to compute timeouts,
and timeout are used in reset function, so the parameter needs to be
initialized to its default value before being used.
 2016-12-12 14:48:43 +01:00
Laurent MEUNIER 9895bcf130 STM32 I2C: restore slave address in case of reset 2016-12-12 14:44:37 +01:00
bcostm fe73b43a0a FIX to add the update of hdma->State variable 2016-12-12 10:43:25 +01:00
Jared Szechy f5f3dc8143 Enable CAN on DISCO_F303VC 2016-12-11 22:03:29 -05:00
Brian Daniels 6085905658 Renames i2c_api.c for STM32F1 targets to fix IAR exporter. 
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
 2016-12-09 12:47:17 -06:00
Martin Kojtal ce9d2526f8 Merge pull request #3409 from jeromecoutant/PR_ST_L1_ASSERT 
STM32L1 : map ST HAL assert into MBED assert
 2016-12-09 15:38:21 +01:00
Martin Kojtal e01366ce8f Merge pull request #3399 from bcostm/fix_issue_3266 
NUCLEO_F103RB - Add SERIAL_FC feature
 2016-12-09 15:37:57 +01:00
Martin Kojtal b13954c6b5 Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config 
STM32 NUCLEO-L152RE Update system core clock to 32MHz
 2016-12-09 15:36:07 +01:00
Martin Kojtal a3e41f246e Merge pull request #3369 from adustm/disco_f469_newpins 
Add CAN2 missing pins for connector CN12
 2016-12-09 15:35:07 +01:00
Martin Kojtal 04f940de2d Merge pull request #3324 from LMESTM/dev_i2c_common_code 
Dev i2c common code
 2016-12-09 15:30:00 +01:00
jeromecoutant 4ea65df99d STM32F3 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:56:52 +01:00
jeromecoutant 008a12327c STM32F2 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:52:51 +01:00
jeromecoutant 0e404c2b48 STM32F1 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
 2016-12-09 14:48:26 +01:00
jeromecoutant 3734269326 STM32L4 : correct ST HAL API call 
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 13:58:22 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
 2016-12-09 11:32:08 +01:00
jeromecoutant db9dcb8b40 STM32F7 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:58:54 +01:00
jeromecoutant 6aef5333bd STM32F0 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:44:54 +01:00
Sam Lin b2f8de8294 Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG 2016-12-09 10:44:28 +08:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 88988b688b Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-08 16:43:26 +01:00
jeromecoutant 64e92a54de STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 16:15:47 +01:00
bcostm db8f966a2c Correct A3, A4, A5 pins definitions 2016-12-08 15:57:05 +01:00
bcostm 9ce9d1a9e7 Correct SDIO_UART pins configuration 2016-12-08 15:57:05 +01:00
bcostm 49755981dd Add this platform in mbed_rtx.h file 2016-12-08 15:57:05 +01:00
bcostm 5b2946ded9 Correct system clock configuration 2016-12-08 15:57:05 +01:00
bcostm 1796e8cd9a Update hal_tick files 2016-12-08 15:57:05 +01:00
bcostm 19828d8dd5 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-08 15:57:05 +01:00
bcostm 2ccbd27baf Add GCC_ARM files and fix errors during GCC build 2016-12-08 15:57:05 +01:00
bcostm f1c6b0f842 Add cmsis, hal_tick, system files 2016-12-08 15:57:05 +01:00
bcostm 3b1fb796c3 Add first pin, port and objects files 2016-12-08 15:57:05 +01:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
jeromecoutant fa8529dea3 STM32F4 : refactor stm32f4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-07 15:31:41 +01:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
jeromecoutant 06ffb4cf8a STM32F2 : map ST HAL assert into MBED assert 2016-12-07 14:52:24 +01:00
jeromecoutant f0156306ac STM32F0 : map ST HAL assert into MBED assert 2016-12-07 14:13:19 +01:00
jeromecoutant b606267641 STM32F1 : map ST HAL assert into MBED assert 2016-12-07 14:08:06 +01:00
andreas.larsson b5b3bede31 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-07 12:22:31 +01:00
Laurent MEUNIER 8e11541a74 STM32 NUCLEO-L152RE Update system core clock to 32MHz 
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
 2016-12-06 11:45:19 +01:00
adustm 3fdbe85b00 Add CAN2 missing pins for connector CN12 2016-12-05 18:24:30 +01:00
Martin Kojtal bd499daae8 Merge pull request #3304 from jeromecoutant/PR_L476 
STM32L476: no HSE is present in NUCLEO and DISCO boards
 2016-12-02 15:48:38 +01:00
Martin Kojtal 1c2c121741 Merge pull request #3303 from adustm/stm_fix_interrupt_in 
Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor
 2016-12-02 15:47:50 +01:00
Laurent MEUNIER 29b32b84b3 STM32 I2C - 1MHZ frequency is allowed 
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
 2016-12-01 15:20:11 +01:00
bcostm 18dc6f4f81 Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-11-30 11:31:25 +01:00
jeromecoutant 448f501d4a STM32L476: comments update 2016-11-30 08:52:49 +01:00
jeromecoutant 757944ee24 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-11-30 08:51:18 +01:00
Laurent MEUNIER 3fad50287c [STM32] Make most of the I2C code into a common file 
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive 
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER a0722b1086 [STM32] HAL F2: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 85a2f7ac49 [STM32] HAL L1: I2C fix btf / rxne cases 
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates 
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
 2016-11-30 08:23:13 +01:00
Martin Kojtal c57427f77f Merge pull request #3321 from jeromecoutant/PR_L432KC 
no HSE available by default for NUCLEO_L432KC
 2016-11-29 18:25:17 +01:00