TDBStore used to rely on Flash devices erase value.
This logic has been removed, and TDBStore can do the entire erase
logic itself, in case the given BlockDevice does not offer erase().
This relies on BlockDevice to properly return -1 in BlockDevice::get_erase_value().
Previous logic caused garbage collection to kick in, if the init() was
called on empty storage. This has effect of erasing areas twice, if both
areas were empty.
Re-write logic so that we erase areas only on garbage_collect() or reset().
The init() logic already chooses the active area, so no need to touch,
until keys are modified.
Removed also the is_erase_unit_erased() as this is working only on
FLASH devices, and TDBStore should be refactored to work on all storages.
Change the "reserved data" logic so that every time we erase and area,
the content of reserved data is then immediately copied to newly erased
area. This keeps two copies of the data.
When data is requested, return only if checksum is matching.
When data is written, only allow if BOTH checksums are incorrect, meaning
that areas are either corrupted or erased.
Only exception is TDBStore::reset() which erases all keys and reserved data.
Removed all logic that tried to detect, if reserved are was erased or
corrupted. Rely entirely on checksum.
Add moduletest for reserved data.
When using MbedCRC, init value must be non-reversed, regardless of
`reflect_data` or `reflect_out` settings. This means we need to reflect
the intermediate output before passing using it as the next init value.
(In GCC this ends up putting in two `RBIT` instructions back-to-back,
because it's implemented as assembler, so it doesn't know how to
optimise. In ARMC6, `__RBIT` is implemented as an intrinsic, so adding
this reflection cancels the existing reflection and makes the code
smaller).
* Make mbed_error use bitwise MbedCRC call rather than local
implementation.
* Remove use of POLY_32BIT_REV_ANSI from LittleFS.
* Move some MbedCRC instances closer to use - construction cost is
trivial, and visibility aids compiler optimisation.
* Use compile-time detection of hardware CRC capability, so unneeded
code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
16-entry tables or 256-entry tables for software CRC. Default set
to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
optimising bitwise computation using inline assembler.
Incompatible changes:
* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
or can use hardware acceleration, which was disabled for
POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
corrected, but software CRC results will be different from the previous
software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
but placed in the lowest bits, like other sizes. This means that code
performing the SD command CRC will now need to use `(crc << 1) | 1`,
rather than `crc | 1`.
* Change "is supported" check to be a macro, so it can be done at
compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
Seppo Takalo
Hugues Kamba
jeromecoutant
Martin Kojtal
Ari Parkkila
Qinghao Shi
Michal Paszta
hamza-ubx
Kevin Bracey
Veijo Pesonen