Before this PR:
```
Successful exports:
* K64F::uvision .\projectfiles\uvision\Unnamed_Project_K64F
```
After this PR:
```
Successful exports:
* K64F::uvision .\projectfiles\uvision_K64F\Unnamed_Project
```
The directory name now contains <ide>_<target>, and there's a single
project per directory as a result.
if we work with relative sources, the flag should be set to True, otherwise
False.
This fixes wrong paths when exporting with --source argument. The exporter would
assume sources were copied, and thus reference them all within the root of the generated
project.
The IAR assembler doesn't accept '--preinclude', but it accepts -D.
This commit changes the way the config-related macros are propagated
to the IAR assembler to use '-D' instead of '--preinclude'. This is
the only change related to functionality, the others are small,
backward compatible changes to the config code to make passing arguments
to the toolchain instances easier.
Tested by compiled blinky with IAR, GCC_ARM and ARM for K64F.
We changed the stack size of main thread for RZ_A1H.
We changed "OS_MAINSTKSIZE" from 2048 to 4096.
Because stack shortage was found in the automatic test by the CI System .
- Removing stack & heap (dynamic) RAM information
This information was misleading and shouldn't be shown in memap.
E.g. each task may have its own stack region configured at run time.
- Adding 'bytes' unit in the total memory info
- Right aligment of numbers, so it is easier to compare numbers
Update of STM32L4 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32L1 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32L0 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F7 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F3 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Signed-off-by: Erwan GOURIOU <frq07517@st.com>
Update of STM32F1 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F0 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F4 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
0xc0170
Bogdan Marinescu
tomoyuki yamanaka
Mihail Stoyanov
sarahmarshy
Sam Grove
Jimmy Brisson
Mihail Stoyanov
Marcelo Salazar
Bogdan Marinescu
Vincent Coubard
Erwan GOURIOU