Commit Graph

25 Commits (5bb3ede8904d2488c60b1d7539dff2edcce87062)

Author SHA1 Message Date
jeromecoutant 9f4bec2f2e STM32F0 : ST CUBE version update to V1.9.0
- Previous ST Cube version: V1.7.0
- CMSIS part update from 2.3.1 to 2.3.3
- HAL part update from 1.5.0 to 1.7.0
2018-01-05 14:46:33 +01:00
bcostm 9f86a32baf Add freeze timer on debug for all STM32 devices
This is a continuation of the work done on the STM32F401xE devices only.
2017-09-18 13:31:46 +02:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets
remove duplicate sys.cpp
2017-09-11 13:20:32 -05:00
Russ Butler 72f07ec4d9 Make room on stm32f07 for tickless
Decrease the interrupt stack from 2k down to 1k so there is enough
ram to build all the tests with tickless enabled. In general, targets
should not need an interrupt stack greater than 1k with mbed-os.
2017-09-07 21:35:06 -05:00
jeromecoutant c13998f306 STM32F0 : json clock source configuration
- default value is the same as before patch
- system_stm32f0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-19 16:23:40 +02:00
Jimmy Brisson b38c85cafe Merge pull request #4525 from fahhem/patch-1
Improve the startup code on the STM32F070
2017-07-10 12:04:42 -05:00
Jimmy Brisson 0d2fb2d0a7 Merge pull request #4390 from mickeyln/patch-1
Nucleo-F070RB It doesn't work when use internal clock
2017-06-26 10:20:50 -05:00
Russ Butler 47b78a2d17 Fix STM32 crashes on boot due to unset VTOR
Remove HAL_Init and related code from SystemInit and move it to
mbed_sdk_init. The function SystemInit is called early in the boot
sequence before RAM is initialized or the VTOR is setup, so it should
not be used to perform the HAL initialization.

This fixes crashes due the vector table being used before it has been
relocated.
2017-06-13 12:12:20 -05:00
Fahrzin Hemmati 28e8bc04e9 do while -> while 2017-06-12 05:12:45 -07:00
Fahrzin Hemmati 53f5f662ca Fix add -> adds typo 2017-06-12 05:11:48 -07:00
Fahrzin Hemmati 38b64ab927 Improve the startup code on the STM32F070
This reduces the number of loads inside of the .data copy loop by 3 by using one more register. It should work on any STM32 with at least 5 general-purpose registers. If only 4 are available, then 1 load could still be removed from the original implementation.
2017-06-12 05:05:41 -07:00
Russ Butler 805374ed89 Restore cmsis_nvic for Cortex-M0 targets
Restore cmsis_nvic (cmsis_nvic.c and cmsis_nvic.h) files for the
implementations which use a mechanism other than the VTOR to set
interrupts. These are vendor specific and were done for M0 devices
which do not have a VTOR.

Note - There were two cmsis_nvic files which did not use the VTOR that
which not restored in this patch. This is because these targets were
not M0 devices and could use the new unified implementation instead.
These files are:
targets\TARGET_ARM_SSG\TARGET_MPS2\TARGET_MPS2_M0P\device\cmsis_nvic.c
targets\TARGET_ONSEMI\TARGET_NCS36510\device\cmsis_nvic.c

Note - cmsis_nvic.c and cmsis_nvic.h were initial removed in
(and restored from) the commit:
b97ffe8fdc -
"CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation"
2017-06-08 22:50:23 -05:00
Sam Grove 72de85c62f Merge pull request #4417 from monkiineko/master
STM32: Fix 32-bit us ticker interrupt scheduling
2017-06-06 19:59:52 -05:00
Bradley Scott 260378e774 STM32: Fix 32-bit us ticker interrupt scheduling
For STM32 targets using a 32-bit timer for the microsecond ticker, the
driver did not properly handle timestamps that are in the past.  It
would just blindly set the compare register to the requested timestamp,
resulting in the interrupt being serviced up to 4295 seconds late
(i.e. after the 32-bit timer counts all the way around to hit the
timestamp again).

This problem can easily be reproduced by creating a Timeout object
then calling the timeout's attach_us() member function to attach a
callback with a timeout of 0 us.  The callback will not get called for
over 2147 seconds, and possibly up to 4295 seconds late if no other
microsecond ticker events are getting scheduled in the meantime.

Now, after the compare register has been set, the timestamp is checked
against the current time to see if the timestamp is in the past, and
if so, the compare event is manually set.

NOTE: By checking if the timestamp is in the past after configuring the
capture register, we ensure proper handling in the case where the timer
updates past the timestamp while setting the capture register.
2017-06-01 12:52:03 -04:00
mickeyln dc9cd2eaab Update system_stm32f0xx.c 2017-06-01 11:56:07 +08:00
Bartek Szatkowski b97ffe8fdc CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation 2017-05-30 18:55:51 +01:00
mickeyln 0f5823aa66 Update system_stm32f0xx.c 2017-05-25 11:33:26 +08:00
Laurent MEUNIER af6cdabc28 STM32Cube_FW_F0_V1.7.0
CMSIS v2.3.0 => v2.3.1
    STM32F0 HAL v1.4.0 => v1.5.0
    LL Layer introduction for STM32F0
2017-01-10 16:50:35 +01:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm ae858b4323 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-11-14 09:31:14 +01:00
bcostm 68915b7c27 STM32F0 - Add the timer type used (16b or 32b) + periph clock in hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 4c7176fc2f Replace all devices hal_tick files with a common 16b and 32b version 2016-11-14 09:31:14 +01:00
Michel Jaouen 702f64a6f2 STM32F0xx: GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-27 10:40:02 +02:00
Michel Jaouen 9f20c4641d STM32F0xx : GCC_ARM use a call to _start which performs
zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
2016-10-27 10:39:02 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00