I modified RAM size of ARMCC compiler for GR-LYCHEE.
In case of GR-LYCHEE, RAM size is 3M Byte(including Non-Cache area), but there was a typo at MACRO definition.
The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json
The mainly changes is below:
- Add flash_api.c
- Add the definition of SPI multi I/O Bus controller that is used for flash access
- Add "FLASH" as device feature
- Add the macro regarding information of the incorporated Flash
- Add the processing to expand code to RAM
I implemented USTICKER feature.
The mainly changing is here.
- I added a macro to mbed_drv_cfg.h for commonalizing code for GR-PEACH and GR-LYCHEE with different clock frequencies, and referenced it's macro at us_ticker.c.
- ticker_init()
Currently, ticker_init() keep counting, disables the ticker interrupt, and is safe to call repeatedly.
Therefore, in order to satisfy specifications, I removed GIC_EnableIRQ at end of function and added GIC_DisableIRQ at begin of function.
When an interrupt is required, it will be set with ticker_set_interrupt().
If executing the following, the counter has been initialized. So it will not call after executing the first time.
OSTM1TT = 0x01; /* Stop the counter and clears the OSTM1TE bit. */
OSTM1TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
- ticker_free()
this function stops the counting and powerdown the us_ticker.
To satisfy the mbed specificationm, I implemented free() function.
- ticker_read()
Currently, Mbed spec's frequeny is between 250KHz and 8MHz, but the frequency that is used at my ticker is 33MHz.
Therefore, in order to satisfy specifications, I changed the process to return the timer counter value divided by 32(33MHz / 32).
Since the calcurate function by using 64 bit is no longer necessay, I removed it.
- ticker_set_interrupt()
Same as the above read(),
In order to satisfy specifications, I changed the process to set the value multiplied by 32.
- ticker_fire_interrupt()
In order to satisfy specifications, I implemented fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- ticker_get_info()
To satisfy the mbed specificationm, I implemented ticker_get_info() function. The value of freq includes rounding off.
Renesas mbed boards incorporate NVIC Wrapper because Cortex-A9 use GIC. For example, NVIC_SystemReset() is defined in nvic_wrapper.c and declared in nvic_wrapper.h.
Because I removed one of include processing accidentally, I fixed the lack.
This supplements PR #5890.
Related to the review of #5857, I fixed the TRNG function for GR-LYCHEE.
- I modified to zeroize "recv_data" before the function return.
- I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return.
- In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
I modified the lack of license header in the below header files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
TomoYamanaka
Bartek Szatkowski