Commit Graph

208 Commits (4295891dd340c3f3b5ae148d7352f2429d2f3d59)

Author SHA1 Message Date
Martin Kojtal e75794ec6e
Merge pull request #9888 from ARMmbed/feature-armc6
ARM Toolchain update to ARM Compiler 6.11(ARMC6)
2019-03-04 12:23:38 +01:00
deepikabhavnani a9ce4b3d9a Target_WIZWIKI: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:52:06 -06:00
deepikabhavnani 7f6b4e51a3 Microlib only supports the two region memory model
Update arm_std.c and linker scripts to use ARM_LIB_STACK
and ARM_LIB_HEAP section from scatter files, instead of user
defined symbols
2019-02-28 19:52:06 -06:00
Cruz Monrreal e393c2dc0b
Merge pull request #9785 from c1728p9/default_to_us_ticker
Use us ticker for tickless on devs with wrapper
2019-02-28 18:25:01 -06:00
Kevin Bracey 0adc7dc927 RTX5: Make rtx_core_ca.h cope with compiler in Thumb mode
Assembler in rtx_core_ca.h is on the whole unified syntax such that it
should work fine if assembled as either ARM or Thumb-2.

The exception was __get_PSP, which uses STM^, which is only available
in ARM state.

Flagging for this function was incorrect, except for IAR - it switched
assembler state without telling the compiler, meaning that the resulting
assembler output could be incorrect, and that the function itself would
not be correctly marked as an ARM function - the CPU would enter in
Thumb state.

Alternative fix would be to switch to System mode, which would work
as either ARM or Thumb-2 assembler, like the rest of the file, but
this is the minimal change.

Fixes #526.
2019-02-28 11:55:20 -06:00
d-kato 0ef1620ffb Back to the original : "rtx_core_ca.h" 2019-02-28 11:55:19 -06:00
d-kato 7aebee07b1 GR_LYCHEE,RZ_A1H,VK_RZ_A1H: Update to fix ARMC6 build failures 2019-02-28 11:55:19 -06:00
Cruz Monrreal 3352b431b3
Merge pull request #9786 from c1728p9/tickless_optimization
Optimize tickless tick computation
2019-02-26 23:22:04 -06:00
Russ Butler f6ed7cee41 Optimize tickless interrupt latency
Remove unnecessary critical sections from the SysTimer code since
the access should already be serialized.
2019-02-23 17:44:51 -06:00
Russ Butler d43ca21ec5 Optimize tickless tick computation
Optimize the tick computation in the following ways:
1. Use relative time rather than absolute time
2. Replace multiplication/division pair with just multiplication
    or division:
    "* 1000000ULL / OS_TICK_FREQ"   ->   "* US_IN_TICK"
    "* OS_TICK_FREQ / 1000000"      ->   "/ US_IN_TICK"
2019-02-23 17:44:29 -06:00
Russ Butler d901c51056 Apply astyle fixes
Apply the fixes found from astyle.
2019-02-21 18:43:59 -06:00
Russ Butler b32b996419 Use us ticker for tickless on devs with wrapper
The low power ticker wrapper layer adds a large amount of interrupt
latency. This can cause dropped bytes at a baud of 115200 on some
devices. To prevent this by default use the microsecond ticker for
tickless on devices which make use of the low power ticker wrapper.
2019-02-21 10:51:10 -06:00
Deepika f13a3e32b6 Fix GCC _sbrk allocation 2019-02-19 15:49:49 -06:00
deepikabhavnani b36147fbe9 ISR_Stack_start/size defines are not needed, use linker file defines 2019-02-19 15:49:49 -06:00
deepikabhavnani 9d1ce66b14 ISR_STACK_START/ HEAP_START defines not used by GCC_ARM toolchain 2019-02-19 15:49:49 -06:00
Deepika 537b3646d3 Resolve build/type cast errors 2019-02-19 15:49:49 -06:00
Deepika 41eaefeeb4 Update memory model for stack and heap memory
Memory model for RTOS and No RTOS was initially single stack and heap,
only few targets implemented 2-region RAM model.

2-region RAM model is applied for all toolchains and targets.

GCC: __wrap__sbrk was implemented for 2-region ram model, with switch to 2-region
for all targets, we do not need target specific implementation of this API
Also _sbrk is WEAK function, hence can be over written in target folder for
special cases
2019-02-19 15:49:45 -06:00
Deepika a1fe75093e Interrupt stack is always explicitly specified, hence other condition is not needed
Earlier if interrupt stack is specified it was used and remaining section of
IRAM was used to allocate heap, if stack is not specified heap section was
reduced by isr stack size and it was added at the end of RAM

With 2-region RAM support interrupt stack will always be specified.
2019-02-19 15:46:32 -06:00
Oren Cohen 5dbb8fef09 Call tfm_ns_lock_init() on TFM NSPE boot 2019-02-19 15:19:02 +02:00
Oren Cohen 34895a05ad CR fixes 2019-01-31 17:17:54 +02:00
Oren Cohen 8841ba69f8 Align to new spec changes and prep for TFM SPM
# Conflicts:
#	components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/psa_crypto_spm.c
#	components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c
2019-01-31 17:17:53 +02:00
Bartek Szatkowski 094662790a CMSIS/RTX: Pre-processor defines used for assembly
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.

1. Patch RTX so irq_cm4f.S files work with no FPU targets
2. Patch RTX so irq_armv8mml.S files to work with and without FPU
2. Patch RTX so irq_armv8mml.S and irq_armv8mbl.S files to work with secure and
   non-secure builds
2019-01-18 17:39:43 -06:00
Deepika bb25e8660d Reverted 4 CMSIS/RTX commits for Assembly files
1. Revert "CMSIS/RTX: __FPU_USED to be set based on HW FPU support"
This reverts commit b4f5bed7e75c21927c954a50d40422b81a1de5a0.

2. Revert "CMSIS/RTX: Update Armv8M IAR 8.x assembly files - add END"
This reverts commit b228cd9db0.

3. Revert "CMSIS/RTX: Pre-processor defines used for assembly"
This reverts commit 287121ffdc.

4. Revert "CMSIS/RTX: Patch RTX so irq_cm4f.s files work with no FPU targets"
This reverts commit cc2e0517e1.
2019-01-18 17:31:42 -06:00
deepikabhavnani ba92372b8d CMSIS/RTX: Move Idle and Timer thread stack to bss section.
In case of ARM compiler, idle and timer thread stack though assigned
to `.bss.os` section since not zero initialized are part of `data` section.

In this commit, we are moving stacks of idle and timer thread to bss
section and thereby saving ROM space.
2019-01-15 12:04:39 -06:00
Deepika 255661e55b Adding debugger awarness with Keil MDK
Main thread in Mbed OS is statically allocated and was not available in call
stack of Keil MDK. The RTX5 kernel requires statically allocated thread
information objects that are placed into a specific section to enable RTOS
thread awareness in Keil MDK. This fix is to keep main thread in specific
section of memory.
2019-01-15 12:04:39 -06:00
Martin Kojtal aff2bee8a4
Merge pull request #9352 from mprse/armc6_fix
mbed_boot_arm_std.c: remove redundant compiler check
2019-01-15 10:39:01 +01:00
Martin Kojtal 116e42f840
Merge pull request #9295 from deepikabhavnani/iar_asm
Add missing END to Armv8M IAR assembly files
2019-01-14 08:54:21 +00:00
Przemyslaw Stekiel 8cc4234181 mbed_boot_gcc_arm.c: remove redundant compiler check 2019-01-11 12:59:53 +01:00
Przemyslaw Stekiel bfcdb7dd3c mbed_boot_arm_std.c: remove redundant compiler check
Check is not needed since this file is exclusive for ARM compiler.
It causes problems on ARMC6.
2019-01-11 12:59:21 +01:00
Deepika b228cd9db0 CMSIS/RTX: Update Armv8M IAR 8.x assembly files - add END
Add missing END to the IAR assembly files. In future this commit should be
merged to other assembly file commit, when performing CMSIS update.
287121ffdc
2019-01-10 13:57:01 -06:00
Przemyslaw Stekiel 1739d7e6dd Define heap/stack start and size based on linker script symbols for ARM and GCC_ARM 2019-01-08 15:32:01 +01:00
Alastair D'Silva 2617c5d55b Don't use define checks on DEVICE_FOO macros (mbed code)
The DEVICE_FOO macros are always defined (either 0 or 1).

This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
2018-12-20 10:16:42 +11:00
Kevin Bracey 770baa22ea Rework MPU use option
Make the option positively named, and as it is a platform config
option make sure it only affects platform code.

HAL functions still remain available even if platform is told not
to use them.
2018-12-11 13:03:59 +02:00
Kevin Bracey 842587ddb5 Save ROM by specifying initial MPU state
We can omit the need for the "change MPU state" calls from simple images
by specifying the initial state at init.
2018-12-10 15:53:34 +02:00
Martin Kojtal fd301c708b rtos: fix copyright years 2018-11-28 10:42:11 +00:00
Martin Kojtal e3ddd519c3 rtos: add spdx license 2018-11-28 10:39:52 +00:00
Martin Kojtal 52822cb8af
Merge pull request #8871 from c1728p9/mpu
MPU API (Reopened)
2018-11-28 10:28:32 +01:00
Russ Butler 1821d37621 Overhaul MPU for new requirements
Make the following changes:
-Allow a vector specific ARM MPU driver by defining MBED_MPU_CUSTOM
-Allow ROM address to be configured for ARMv7-M devices by
    setting the define MBED_MPU_ROM_END
-Add ROM write protection
    -Add new functions and lock
    -enable at boot
    -disable during flash programming
2018-11-27 09:29:32 +00:00
Russ Butler ecd0414494 Integrate MPU with mbed
Enable the MPU as part of the boot sequence and disable it before
starting a new application. Also add reference counted MPU lock and
unlock functions to allow code to execute from ram when necessary.
2018-11-27 09:29:31 +00:00
Oren Cohen dd73fa689c PSA SPM
* Intorduce PSA-SPM to mbed-os
* Add SPM tests (for PSA targets)
* Add PSA PRoT internal storage Secure implementation
* Integrate SPM into the boot proccess
* PSA manifest data generator
* Introduce PSA targets skeleton to mbed-os
* Add artifact delivery to the tools
2018-11-27 09:16:35 +02:00
Senthil Ramakrishnan 6181394e37 Error and fault handling changes for crash reporting 2018-11-16 13:59:59 -06:00
Martin Kojtal 830f7464cc rtx idle: fix coding style 2018-11-15 07:20:10 +00:00
Cruz Monrreal 9d95d46d6c
Merge pull request #8591 from 0xc0170/fix_coding_style_features
features: fix coding style
2018-11-09 09:40:56 -06:00
Martin Kojtal 57be9d2492 Merge branch 'fix_background_overflow' of https://github.com/c1728p9/mbed-os into dev_rollup 2018-11-08 09:21:20 +00:00
Martin Kojtal 87265f7744 rtos: fix coding style in the boot files 2018-11-08 08:54:22 +00:00
Russ Butler 9613e0ffbd Increase background stack size to fix overflows
On platforms using both tickless and the low power ticker wrapper
so much of the background stack is used that it overflows. To
ensure the background thread's stack doesn't overflow increase this
size by 256 bytes when tickless is enabled. Worst case usage
on the NUCLEO_F476RG was recorded at 656 when tickless is
turned on so this increased size should safely prevent overflows.
2018-11-06 10:55:58 -06:00
Jeroen de Bruijn 2ef82e18f5
fix: Remove rtx from main thread name 2018-11-03 18:32:23 +01:00
Jeroen de Bruijn 3f635ef813
fix: Update thread names
Remove _thread suffix and rename threads.
2018-11-02 13:44:24 +01:00
Cruz Monrreal 5ed07c2dd4
Merge pull request #8328 from kjbracey-arm/noreturn
Error path tightening: use MBED_NORETURN; add+use core_util_atomic_flag
2018-10-29 20:49:54 -05:00
Kevin Bracey 90a731daee rtos_idle_loop is MBED_NORETURN
Don't need loops at two layers.

Also tighten up slightly-invalid extern "C" markings.
2018-10-29 13:58:06 +02:00