Commit Graph

17 Commits (34ef11630c2660bdb8643ebe7e87713944ab20c4)

Author SHA1 Message Date
bcostm 9f86a32baf Add freeze timer on debug for all STM32 devices
This is a continuation of the work done on the STM32F401xE devices only.
2017-09-18 13:31:46 +02:00
lordguilly 909a8343f5 Change HSE for blupill,can only be XTAL
The BLUEPILL board does have XTAL soldered, cannot be used with an external oscillator
2017-07-24 22:36:40 +01:00
jeromecoutant 68e1b2b465 STM32F1 : json clock source configuration
- default value is the same as before patch
- system_stm32f1xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-19 16:23:41 +02:00
Russ Butler 47b78a2d17 Fix STM32 crashes on boot due to unset VTOR
Remove HAL_Init and related code from SystemInit and move it to
mbed_sdk_init. The function SystemInit is called early in the boot
sequence before RAM is initialized or the VTOR is setup, so it should
not be used to perform the HAL initialization.

This fixes crashes due the vector table being used before it has been
relocated.
2017-06-13 12:12:20 -05:00
Sam Grove 72de85c62f Merge pull request #4417 from monkiineko/master
STM32: Fix 32-bit us ticker interrupt scheduling
2017-06-06 19:59:52 -05:00
Bradley Scott 260378e774 STM32: Fix 32-bit us ticker interrupt scheduling
For STM32 targets using a 32-bit timer for the microsecond ticker, the
driver did not properly handle timestamps that are in the past.  It
would just blindly set the compare register to the requested timestamp,
resulting in the interrupt being serviced up to 4295 seconds late
(i.e. after the 32-bit timer counts all the way around to hit the
timestamp again).

This problem can easily be reproduced by creating a Timeout object
then calling the timeout's attach_us() member function to attach a
callback with a timeout of 0 us.  The callback will not get called for
over 2147 seconds, and possibly up to 4295 seconds late if no other
microsecond ticker events are getting scheduled in the meantime.

Now, after the compare register has been set, the timestamp is checked
against the current time to see if the timestamp is in the past, and
if so, the compare event is manually set.

NOTE: By checking if the timestamp is in the past after configuring the
capture register, we ensure proper handling in the case where the timer
updates past the timestamp while setting the capture register.
2017-06-01 12:52:03 -04:00
Bartek Szatkowski b97ffe8fdc CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation 2017-05-30 18:55:51 +01:00
Laurent MEUNIER c98342eaa1 Fixing Typo in MACRO 2017-05-11 09:20:39 +02:00
Laurent MEUNIER 675d78d180 STM32 remove usage of deprecated MACROs 2017-05-09 16:48:34 +02:00
Laurent MEUNIER a8d666fe6f F1 CUBE V1.5.0
HAL V1.1.0
LL V1.1.0
CMSIS V4.2.0
2017-05-04 10:31:59 +02:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm ae858b4323 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-11-14 09:31:14 +01:00
bcostm a43e5b8a48 STM32F1 - Remove devices hal-tick files and update hal_tick.h 2016-11-14 09:31:14 +01:00
Martin Kojtal 4a4d09f6d1 Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT
Target STM - init gcc alignement
2016-10-28 11:04:50 +02:00
Michel Jaouen b225a5ca97 STM32F1xx : GCC_ARM remove zero bss done at startup.
Zero bss is done after the call to _start.
2016-10-27 10:40:17 +02:00
bcostm 8a570cce93 STM32F1: correct the read of timer master value 2016-10-19 16:46:51 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00