The code is written such that access to the data input/output happens word-by-word, and that means unaligned access is fine (though with a performance loss) on Cortex-M3/M4 devices.
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
Re-implemented both us_ticker and lp_ticker to match the new API and specifications.
Details:
* On EFM32GG, EFM32WG, EFM32LG, EFM32HG, EFM32ZG: Use the RTC peripheral to back lp_ticker, and a TIMER to back us_ticker.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: Use the RTCC peripheral to back lp_ticker (dual-purpose, also used to back RTC), and a TIMER to back us_ticker.
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
# Conflicts:
# targets/TARGET_Silicon_Labs/TARGET_EFM32/lp_ticker.c
# targets/TARGET_Silicon_Labs/TARGET_EFM32/rtc_api.c
# targets/targets.json
* Since mbed does not overwrite itself, make the flashing routines run out of flash by default
* Report a writeable size of 4 bytes (previously erroneously reported a full eraseable page as the minimum write size)
* IRQ handling got updated previously to a non-functional state when both callbacks were registered (it'd fire a fall callback for both rise and fall events). With this update, that faulty behaviour is corrected. Due to delays between the detection of the edge and the handling of the interrupt (and the fact that information about which edge you received on the pin is not stored anywhere), there is no way to be absolutely sure which edge got triggered on the pin. Therefore, we make a best-guess effort by looking at the pin state at the time of IRQ handling, and fire a callback as if that was the end state of the event. This will usually work out fine, except in cases were the signal is toggling faster than the IRQ handler's response time. In that case, a user won't get both callbacks (as expected for a pulse), but only the last event.
* Stripped some dead code.
* Updates driver library to v2.3.1 (2018q1) for bugfixes and convenience functions
* Provides library in correct format (2-byte wchar_t flag) for compiling with ARMCC (#6695 uncovered by #6577)
* Reverts to using a statically-allocated packet buffer since malloc is not thread-safe (and the asserts have been turned on)
* MCUs within a family like EFM32GG can omit some peripherals, e.g. EFM32GG230 doesn't have UART
* This commit adds a check to make them compilable, relevant mainly for custom boards
This commit fixes#5840. Fix verified by running mbed_hal-lp_ticker test suite with preloaded RTC counter such that it wrapped in the middle of the suite.
Also removes explicit sleep blocking from the us_ticker implementation, since sleep blocking for us tickers is done at mbed HAL level now. This was causing one of the lp_ticker tests to fail.
Timer code was written based on integer multiple HF clock frequencies. EFR32 doesn't conform to that (38.4), and so the timestamp ticks were off by 1%. Enough to trip up some CI tests on TB_SENSE_12 (#5496)
Cruz Monrreal
Yossi Levy
Steven Cooreman
Steven
Russ Butler
Oren Cohen
PHST
Bartek Szatkowski
Martin Kojtal
amq
Marcus Chang
Cruz Monrreal
Martin Kojtal
Alessandro Angelino