Currently, if all TX descriptors are in use and IP stack calls K64F/K66F
ethernet driver link out, link out drops the packet. Added 10ms delay
to link out to wait for a descriptor to become available before dropping
the packet.
Changed K64F/K66F power up to return without waiting for link up i.e. for
the ethernet cable to be connected. This is needed for non-blocking use
of driver e.g. for using the driver from event queue.
TX pointer array was using RX ring length in its declaration.
Wasted memory if RX ring > TX ring, as is the default, but would
be broken if RX ring < TX ring.
16 RX buffers and 8 TX buffers is probably excessive. Nanostack
version of driver successfully used 4+4, and data pump should be
broadly equivalent.
This means that switching K64F devices from Nanostack to EMAC increases
base heap usage by 18K - observed in Nanostack border router builds.
Add a config option to make it possible to lower the number of buffers.
Defer consideration of lowering the default to later.
Just checking "does the chip have an EMAC" doesn't work - there are
targets using those chips which do not have an Ethernet connector and
don't provide the necessary surrounding infrastructure (eg DISCO_F429ZI,
not providing the board emac config call, and HEXIWEAR not providing PHY
info).
Make the targets that actually do want EMAC define their own local
Freescale_EMAC and STM_EMAC labels, and move the drivers into
the corresponding TARGET_ directories, removing the #ifdefs.
Martin Kojtal
Mika Leppänen
Kevin Bracey
Mahesh Mahadevan