Commit Graph

9 Commits (240758db42aaa42b2abd50daea5033c3cc7e80dc)

Author SHA1 Message Date
Chun-Chieh Li 3f9ba9e61f NUVOTON: Fix BSP/MKROM header
Related targets:
-   NU_PFM_M2351_*
-   NUMAKER_IOT_M263A
2019-10-24 09:36:25 +08:00
Kevin Bracey 66dea08c0f M2351: include core_cm23.h
Nuvoton M2351 was including generic core_armv8mbl.h from CMSIS - we
need it to be more specific to identify the specific core for
wait_ns. Change to core_cm23.h.
2019-02-26 17:30:51 +02:00
cyliangtw 90fcc04596 [M2351] Migrate for MP chip version, build sucessfully 2018-07-12 17:51:16 +08:00
cyliangtw 46f948aa6f [M2351] Link register base with partition file & correct heap size in linker file 2018-07-12 17:51:11 +08:00
cyliangtw 5985dcd268 [M2351] Support secure loader invoke non-secure Mbed OS 2018-07-12 17:51:10 +08:00
Deepika f7ea847dfe [M2351] ARMC6 compiler related changes 2018-07-12 17:51:04 +08:00
Deepika d46220c7e0 [M2351] Set SAU Region present flag for M2351 device and include security header file.
As per SAU documents, SAU is always present if the security extension is
available. The functionality differs if the SAU contains SAU regions.
If SAU regions are available it is configured with the macro __SAUREGION_PRESENT
2018-07-12 17:51:02 +08:00
Deepika ffcc438b5a [M2351] Use Cortex M23 specific header files and interrupts
1. Update use of correct header files
2. Added missing entry of M2351 device in IAR defines.
3. Removed support of ARM toolchain in targets.json
2018-07-12 17:51:00 +08:00
cyliangtw 205f8dbab2 [M2351] Add one new target M2351, regard as M0+ with some V8M CPU control at first 2018-07-12 17:50:51 +08:00