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204 Commits (239ce02142b1d8f8e89cf35f0e011d69c1ae0926)

Author SHA1 Message Date
jeromecoutant 59fd0c0cce STM32F2/F4/F7 : LL API is now available 2018-07-18 15:17:46 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions 
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
 2018-07-11 14:39:42 +02:00
jeromecoutant 3721ac44d2 STM32 serial RX/TX active patch 
In serial_tx_active and serial_rx_active functions,
we check the internal state value with

HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,

It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
 2018-06-28 18:05:52 +02:00
jeromecoutant e9d7128485 TARGET_STM32F7 astyle 2018-06-27 14:42:56 +02:00
bcostm b5a8dc513c fix hash alignment of F2, F7, L4 2018-06-13 11:51:24 +02:00
Cruz Monrreal 3d61cb59ab
Merge pull request #6948 from jeromecoutant/PR_ETHER 
STM32 ETH : remove TX RX locking interrupt perforation
 2018-06-11 09:02:21 -05:00
Cruz Monrreal 23bc4e0fe2
Merge pull request #7088 from bcostm/dev_F7_flash_dual_bank 
STM32F76x: Add support of dual bank flash mode
 2018-06-11 08:58:55 -05:00
bcostm b087390a1a Remove HAL_TICK_DELAY (no more used) 2018-06-05 16:53:40 +02:00
jeromecoutant b79be416c8 Dual Bank Flash support update 2018-06-04 13:37:59 +02:00
bcostm cc14540140 Add support of Flash dual bank mode on DISCO_F769NI 2018-06-04 13:37:59 +02:00
bcostm b647ecf80c Add support of Flash dual bank mode on NUCLEO_767ZI 2018-06-04 13:37:59 +02:00
Cruz Monrreal 07fb7c1adc
Merge pull request #6987 from jeromecoutant/PR_ADC 
STM32 ADC update
 2018-06-02 19:52:51 -05:00
jeromecoutant 06bca28268 STM32F7 ADC internal channels update 2018-05-22 13:16:37 +02:00
jeromecoutant c31554f618 STM32 ETH : remove TX RX locking interrupt perforation 2018-05-18 10:53:02 +02:00
jeromecoutant b30f3abf11 STM32 PeripheralPins.c second update after review 
genpinmap script version 1.1
 2018-05-17 17:58:09 +02:00
jeromecoutant b928439ef7 STM32F7 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:06 +02:00
jeromecoutant d0da6dd34e STM32F7 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:27 +02:00
Cruz Monrreal 0f51ea031e
Merge pull request #6610 from pauluap/stm32_eth_remove_tx_rx_locking_interrupt_perforation 
Stm32 eth remove tx rx locking interrupt perforation
 2018-05-07 10:51:03 -05:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING 
STM32 compilation warning issues
 2018-04-16 10:41:36 -05:00
Paul Thompson b45d4233e1 Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards 2018-04-13 04:44:43 -07:00
Paul Thompson 2211a27f53 Drop usage of ilen, just use len and cast it to int32_t as appropriate 2018-04-13 00:27:00 -07:00
Paul Thompson 8f4a5e2093 Revert to original fix concentrating on type correctness 2018-04-12 10:09:53 -07:00
Paul Thompson 430784b084 Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues 
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (len > ep->maxpacket)
           ^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (len > ep->maxpacket)
             ^
 2018-04-12 09:43:18 -07:00
Paul Thompson c67f535fb3 Drop locking around TX and RX. The DMA channels are independent of each other 2018-04-12 09:42:28 -07:00
jeromecoutant 2d0dce1db5 STM32F7 : correct compilation warnings 2018-04-12 10:55:02 +02:00
Cruz Monrreal 5648b156e6
Merge pull request #6063 from bcostm/PULL_REQUEST_CUBE_UPDATE_F7_V1.10.0 
STM32F7: Update ST HAL driver with CubeF7 v1.10.0
 2018-02-14 12:41:37 -06:00
Wilfried Chauveau d1a0ff9964 remove magic calibration value for HSI in ST's targets 2018-02-12 16:47:35 +00:00
bcostm 118073a9c5 Add missing can legacy file 2018-02-12 10:37:03 +01:00
bcostm 58c4a5f83e F7 ST CUBE V1.10.0 
F7 HAL driver V1.2.5
 2018-02-12 10:37:03 +01:00
Cruz Monrreal 6a8a818ebf
Merge pull request #6012 from jeromecoutant/PR_SPI_FLUSH 
STM32 SPI ASYNC - Add FIFO flush before transfer
 2018-02-05 10:11:03 -06:00
jeromecoutant 703df3b6f9 STM32F7 SPI - add missing HAL files 
ST_INTERNAL_REF 43358
 2018-02-05 11:06:14 +01:00
Cruz Monrreal 1e794393e5
Merge pull request #5972 from bcostm/dev_BL_STM32F7 
STM32F7: Add bootloader support (new trial)
 2018-02-02 10:05:49 -06:00
Cruz Monrreal f907012e55
Merge pull request #5962 from bcostm/fix_usart_irq_index 
STM32: Fix usart irq index
 2018-01-31 12:16:17 -06:00
bcostm 689e15cf29 STM32 serial: improve irq index management for F7 devices 2018-01-29 17:23:21 +01:00
bcostm 5ad0887d7e NUCLEO_F767ZI: Add bootloader support 2018-01-29 15:53:44 +01:00
bcostm e933971f92 BL NUCLEO_F746ZG: change scb->vector assignment 2018-01-29 15:53:24 +01:00
bcostm e10e555520 BL STM32746xG: Update scatter/link files 2018-01-29 15:52:33 +01:00
jeromecoutant 8f647beacb STM32 : set all PinMap structures as weak 
This allow custom overwrites
 2018-01-29 09:26:49 +01:00
Martin Kojtal 6d52c1c067
Revert "STM32F7: Add bootloader support" 2018-01-25 11:07:01 +00:00
bcostm 4d0535a1bf NUCLEO_F767ZI: Add bootloader support 2018-01-22 11:11:27 +01:00
bcostm 43f4b679c7 BL NUCLEO_F746ZG: change scb->vector assignment 2018-01-22 11:11:27 +01:00
bcostm 728e89dd03 BL STM32746xG: Update scatter/link files 2018-01-22 11:11:27 +01:00
jeromecoutant 93b34070ed STM32F7: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:12:10 +01:00
Jimmy Brisson 62a7ecddd3
Merge pull request #5570 from jeromecoutant/PR_STDIO 
STM32 UART init update
 2018-01-04 09:50:18 -06:00
Kevin Bracey 05e2ae7a70 Add memory barriers to STM32F7xx Ethernet 
Pending official update from STM, add memory barriers to the Ethernet
HAL code for the STM32F7xx family.

Cortex-M7 has a merging write buffer that is not automatically flushed
by accesses to devices, so without these DMBs, we sometimes lose synch
with the transmitter.

The DMBs are architecturally needed in every version of this HAL, but
adding just to the STM32F7 version for now to clear test, as the
problem has only been observed on Cortex-M7-based devices.

Fixes #5622.
 2017-12-20 15:05:29 +02:00
bcostm f08c04d81f STM32 CAN3: add CAN_3 declaration for DISCO_F769NI 2017-12-07 18:12:54 +01:00
bcostm bfc4d68ae0 STM32 CAN3: remove test of CAN_2 and CAN_3 
CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM

Instead put back the test of CAN_NUM (which are defined in can_device.h).
 2017-12-07 18:04:34 +01:00