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14055 Commits (213d2b649e1b64d311ba67604c47befb3346c2b0)

Author SHA1 Message Date
jeromecoutant 785862e69e STM32F2: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:11:57 +01:00
jeromecoutant f97d84654e STM32F1: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:11:51 +01:00
jeromecoutant 88678315f1 STM32F0: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:11:43 +01:00
Przemyslaw Stekiel e725b4c2c5 RTC time conversion test - reduce number of tested years in order to reduce test execution time. 
For each of the following years test example time of the first and last day of each month:
- first - 1970
- example not leap year (not divisible by 4)
- example leap year (divisible by 4 and by 100 and by 400)
- example leap year (divisible by 4 and not by 100)
- example not leap year (divisible by 4 and by 100)
- last fully supported  - 2105

Test execution time on K64F is now ~39 sec.
 2018-01-08 10:14:54 +01:00
Prashant Ravi 62667a4732 Fixing changes as requested 2018-01-08 10:49:46 +08:00
Evan Hosseini 453a1d79f1 ARM: ARMC6: Specify CPU for ARM scatter file preprocessor 
Fixes #5796
 2018-01-05 15:16:57 -06:00
Prashant Ravi f71de8a0d7 Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RTL8195AM 2018-01-06 00:00:50 +08:00
Steven Cartmell 04d2f3de78 Amend critical section function descriptions 2018-01-05 14:55:58 +00:00
Steven Cartmell e14bee5209 Fix potential race condition in critical section HAL API 
Call underlying HAL implementation to enter critical section/disable interrupts
before incrementing the global critical section counter.

Modify HAL implementations to track first entrances to the critical section and
only update the saved state on first enter.
 2018-01-05 14:55:58 +00:00
Steven Cartmell a07c07fa63 Update HAL API header information 2018-01-05 14:55:57 +00:00
Steven Cartmell 84391f0b64 Remove invalid assert and move uVisor warning to correct function 2018-01-05 14:55:57 +00:00
Steven Cartmell 3c9ae7bf1c NRF51_DK: Add Critical Section HAL implementation 2018-01-05 14:55:57 +00:00
Steven Cartmell 07a394ee8b Add Critical Section HAL API specification 
- Define header functions for Critical Section HAL API
  - hal_critical_section_enter()
  - hal_critical_section_exit()

- Add weak default implementation for HAL API. The default implementation
  matches the previous behaviour stored in mbed_critical:
  - The first call to enter a critical section stores the state of interrupts
    before disabling and each successive call re-disables interrupts.
  - The last call (non-nested) will restore the IRQ state that was set on the
    enter to the critical section. Nested calls are ignored.

- Add function 'core_util_in_critical_section' to User facing API to determine
  if the program is currently in a critical section, instead of depending on
  'core_util_interrupts_enabled'.
 2018-01-05 14:53:51 +00:00
jeromecoutant e4169b7a9e STM32: update init procedure 
- STDIO_UART define is no more used
- configuring a new serial with the same UART as STDIO is no more allowed
 2018-01-05 15:16:38 +01:00
jeromecoutant 9f4bec2f2e STM32F0 : ST CUBE version update to V1.9.0 
- Previous ST Cube version: V1.7.0
- CMSIS part update from 2.3.1 to 2.3.3
- HAL part update from 1.5.0 to 1.7.0
 2018-01-05 14:46:33 +01:00
bcostm d96e76e7bd STM32 CAN: fix wrong ID and MASK filter 2018-01-05 10:11:17 +01:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 4023078e14 [NUC472/M487] Remove unnecessary H/W context clone functions in SHA alter. 2018-01-05 09:18:26 +08:00
ccli8 acff29e6f2 [NUC472/M487] Fix context clone corner case in SHA alter. 
As destination/source contexts are the same, we return immediately.
 2018-01-05 09:18:25 +08:00
ccli8 d96bcda606 [NUC472/M487] Fix indefinite loop in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 8b7ff095a9 [NUC472/M487] Remove duplicate configuration of CRPT->SHA_CTL/CRPT->HMAC_CTL in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 a00f8d0e8b [NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter. 
This is to be consistent with PRNG/AES.
 2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 e1fbf0f6a7 [NUC472/M487] Add comment for crypto_zeroize 2018-01-05 09:18:24 +08:00
ccli8 add839c808 [NUC472/M487] Refine code in SHA alter. 2018-01-05 09:18:24 +08:00
ccli8 b443a23b07 [NUC472/M487] Add memory barrier for DMA transfer in AES/DES alter. 2018-01-05 09:18:23 +08:00
ccli8 c906790257 [NUC472/M487] Call BSP driver rather than direct register access in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 9edda18b0f [NUC472] Update BSP crypto driver 2018-01-05 09:18:23 +08:00
ccli8 dc3c84c011 [NUC472/M487] Fix parameter check for TMODE/OPMODE in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 815a6a7c4d [NUC472/M487] Add parameter check for configuring DES registers in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 1d62b9120b [NUC472/M487] Refine comment with BSP driver use in DES alter. 2018-01-05 09:18:22 +08:00
ccli8 479cf687ff [NUC472/M487] Fix multiple calls to SHA free in SHA alter. 2018-01-05 09:18:22 +08:00
ccli8 7d92550d11 [NUC472/M487] Remove superfluous code in AES alter. 2018-01-05 09:18:22 +08:00
ccli8 116b14aa84 [NUC472/M487] Refine code with SHA context selection in SHA alter. 2018-01-05 09:18:22 +08:00
ccli8 980cb6b9c8 [NUC472/M487] Guard against SHA internal state size is not word-aligned in SHA alter. 2018-01-05 09:18:21 +08:00
ccli8 8ba07815ed [NUC472/M487] Fix SHA H/W resource leakage in context cloning 2018-01-05 09:18:21 +08:00
ccli8 83fb50cca3 [NUC472/M487] Fix SHA H/W is not stopped in corner case 
Take SHA1 for example, without the fix, SHA H/W is not stopped in either case:
(1) ctx->total == 0 in mbedtls_sha1_hw_finish()
(2) mbedtls_sha1_hw_finish() is not called by upper layer
 2018-01-05 09:18:21 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-05 09:18:21 +08:00
ccli8 ac000244f4 [NUC472/M487] Refine AES/DES alter. DMA buffer requirement comment 2018-01-05 09:18:20 +08:00
ccli8 aafbdc8d38 [NUC472/M487] Fix compile error with disabled crypto 
For example, even though MBEDTLS_SHA512_C is disabled (via #undef MBEDTLS_SHA512_C),
mbedtls_sha512_context is still necessary due to referenced in sha512.h.
 2018-01-05 09:18:20 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included 
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
 2018-01-05 09:18:20 +08:00
ccli8 ba16fd9617 [NUC472/M487] Refine AES alter. key endianness code 2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 0c2d59d327 [NUC472/M487] Refine AES/DES alter. code 2018-01-05 09:18:19 +08:00
ccli8 289bbf0ec7 [NUC472/M487] Fix AES alter. CFB128 error 2018-01-05 09:18:19 +08:00
ccli8 7076675fec [NUC472/M487] Optimize AES alter. code 2018-01-05 09:18:19 +08:00
ccli8 6cc3aa3e54 [NUC472/M487] Guard from re-entry into crypto H/W 2018-01-05 09:18:19 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-05 09:18:18 +08:00
ccli8 b0eededdaf [NUC472/M487] Fix DES alter. DMA buffer could locate at unsupported region 2018-01-05 09:18:18 +08:00