The default computation assumes that a flash sector is several times
larger than a flash page. On PSoC 6 targets this is not the case
(the two values are the same) so the computed size is too small.
This could cause incomplete data retrieval and mismatch when reading
data in more than one chunk, because every chunk would be read to the
same location at the beginning of the output buffer.
IAR compilation fails at `_fs = { 0 };` due to
```
[Error] FATFileSystem.cpp@285,0: [Pe029]: expected an expression
```
Changing that object initializer list instead, as that seems
to pass IAR compilation, too.
Changed original memset to object initialiser list based on review
feedback from Kevin Bracey.
Thus far the default position has been after the application plus two
spare sectors. For simplicity and to have a predictable location for the
TDBStore with the default configuration the location is now switched to
the end of the flash. Two last sectors to be exact.
Macro which restricted compilation to GCC_ARM is removed.
Existing read_write() test is amended to call stat() and check that correct size is returned.
- Add the no confidentiality & no replay protection flags
- Add actual size parameter in PS/ITS get APIs
- Change a few size parameters from uint32_t to size_t
Musca-A1 is a Cortex-M33 based target with security extension enabled.
- ARM_MUSCA_A1 is the non-secure target running mbed-os.
- ARM_MUSCA_A1_S is the secure target running TF-M.
- TF-M sources were imported and patched in previous commits.
- TF-M secure bootloader (McuBoot) for MUSCA_A1 is submitted by a pre-built binary.
- A post-build hook concatenates The secure and non-secure binaries,
signs it and then concatenates the bootloader with the signed binary.
due to partial implementation. Having FUTURE_SEQUANA_M0 and
FUTURE_SEQUANA PSA targets is misleading.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.
API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++
This gives our existing C implementation essentially all the functionality
needed by C++11.
An actual Atomic<T> template based upon these C functions could follow.
One gets this compiler warning from nvstore.cpp:
```
Compile [ 48.6%]: nvstore.cpp
[Warning] nvstore.cpp@814,9: variable 'os_ret' set but not used [-Wunused-but-set-variable]
```
Turns out it's caused by the fact that the variable is only used
with MBED_ASSERTs, which get optimized out or not, depending on your
build profile. In reality we do not need a separate variable for that
in my opinion though, so we can just use the ret-variable instead
and drop the os_ret variable completely and thus avoid this
compiler warning.
To support block device out of mbed-os tree in KVStore, user needs to:
1. Configure blockdevice to "other".
2. Override get_other_blockdevice() to provide block device out of mbed-os tree.
Martin Kojtal
Vairamuthu Ramasamy
Kyle Kearney
Matthew Macovsky
Janne Kiiskila
Michal Paszta
Chun-Chieh Li
Veijo Pesonen
Seppo Takalo
int_szyk
Marcin Tomczyk
Kevin Bracey
David Saada
Volodymyr Medvid
jeromecoutant
Qinghao Shi
Oren Cohen
Michael Schwarcz
Devaraj Ranganna
Olli-Pekka Puolitaival
Anna Bridge
Martin Kojtal
Yossi Levy
Cruz Monrreal