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2 Commits (1816f0b7dc52f12edc3edb7fa85b7d8615f89a07)

Author SHA1 Message Date
Russ Butler cf5cd7dfd4 Ensure isr cannot occur after NVIC_DisableIRQ 
Add data and instruction synchronization barriers to prevent
interrupts from occurring after NVIC_DisableIRQ is called. This
is a backport of changes made in CMSIS_5.
 2016-11-17 12:26:45 -06:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory 
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
 2016-10-04 17:51:44 -05:00