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15 Commits (0ed0a9e1b0b0b093fb33f20b05d9dfbd2a273397)

Author SHA1 Message Date
Michel Jaouen 873cacfc73 Revert "Revert "Target stm usb config"" 
This reverts commit ec329be6f2.
 2017-03-14 15:57:28 +01:00
Sam Grove ec329be6f2 Revert "Target stm usb config" 2017-02-09 15:37:19 -06:00
Michel Jaouen 4d59c8857d TARGET_STM :move usb config file to target dir 2017-02-03 10:32:19 +01:00
Sam Grove def8b32121 Merge pull request #3181 from ohagendorf/nucleo_f207_peripheralpinsextension 
NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now
 2017-02-02 10:38:37 -06:00
Laurent MEUNIER 42f6622f8e STM32: Move types definitions to a common file 
Only one point of attention:
STM_MODE_ANALOG_ADC_CONTROL is a specific mode that is only supported on L4.
So STM_MODE_ANALOG_ADC_CONTROL was moved to index 13 (last entry)
of gpio_mode table so that all the other modes are common and only the last
one is specific.
 2017-01-24 10:58:36 +01:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm 0524811c75 STM32xx - Remove hal_tick.c files and update hal_tick.h with new macro 2016-11-14 09:31:14 +01:00
Olaf Hagendorf 49fcc3b627 NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now 
Through some minor extensions it is now possible to use all available alternate functions of a specific gpio pin. These alternatives exist up to now only as commented lines in PeripheralPins.c.
An API change is not necessary for this new functionality, only several pin definitions.

The new definitions now looks like:

    {PA_0,            ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC1_IN0
    {PA_0_ALT0,  ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC2_IN0 // choice: PA_0 with ADC_1
    {PA_0_ALT1,  ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC3_IN0 // choice: PA_0 with ADC_1

PA_0, PA_0_ALT0 or PA_0_ALT1 has to be used as pin names for the usage of the three possible ADC blocks (ADC1, ADC2, ADC3) connected to the pin (PA_0).
 2016-11-01 18:04:55 +01:00
Michel Jaouen 759837aff4 STM32F207: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-19 14:54:41 +02:00
Sam Grove 864ff7754b Merge pull request #2924 from bcostm/adcintch_F2 
STM32F2xx - Add support of ADC internal channels (temperature, VRef, VBat)
 2016-10-07 11:33:11 -05:00
bcostm dfc2a2d097 Add VBat channel and manage better the internal channels configuration 2016-10-05 14:58:01 +02:00
bcostm 007aac86ca Add channel 17 for VRef 2016-10-05 11:02:11 +02:00
bcostm ad431dc613 STM32F2xx - Add support of ADC internal channels (temperature) 2016-10-05 10:25:03 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory 
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
 2016-10-04 17:51:44 -05:00
Christopher Haster 0bad622a16 restructure - Moved targets out to top level 
hal/targets -> targets
hal/targets.json -> targets/targets.json
 2016-09-30 19:18:09 -05:00