lwIP was using us_ticker unnecessarily, complicating the code and
potentially causing grief with power saving, and possible glitches
on timer wrap. Switch it to use the RTOS tick count.
Compile: lwip_stack.c
In file included from ../features/FEATURE_LWIP/lwip-interface/lwip_stack.c:41:0:
../features/FEATURE_LWIP/lwip-interface/lwip_stack.c: In function 'mbed_lwip_bringup_2':
../features/FEATURE_LWIP/lwip-interface/ppp_lwip.h:58:44: warning: statement with no effect [-Wunused-value]
#define ppp_lwip_disconnect() ERR_IF
^
../features/FEATURE_LWIP/lwip-interface/lwip_stack.c:858:21: note: in expansion of macro 'ppp_lwip_disconnect'
ppp_lwip_disconnect();
^~~~~~~~~~~~~~~~~~~
../features/FEATURE_LWIP/lwip-interface/ppp_lwip.h:58:44: warning: statement with no effect [-Wunused-value]
#define ppp_lwip_disconnect() ERR_IF
^
../features/FEATURE_LWIP/lwip-interface/lwip_stack.c:875:21: note: in expansion of macro 'ppp_lwip_disconnect'
ppp_lwip_disconnect();
^~~~~~~~~~~~~~~~~~~
Glue code was inspecting lwIP's netconn "type", checking directly for
NETCONN_UDP and NETCONN_TCP.
Unfortunately the type byte has some flag bits like
"IPv6", which means the tests fail if it's an IPv6 socket. So, for
example, TCP socket options were rejected for IPv6.
Add the necessary NETCONNTYPE_GROUP macros to fix this.
This patch changes the way data is put in the TX_DATA_PORT register when
sending packet over Ethernet.
When this driver is compiled with release compilation profile
(space optimization compiler options) with Arm compiler version 5,
the line:
SMSC9220->TX_DATA_PORT = *pktptr;
generates the assembly instruction to get the pktptr pointed value:
LDM r2!, {r3}
with pktptr = r2
However, the code does not prevent the pktptr value from being unaligned
(to a 32 bits boundary) in that zone and the LDM instruction causes a
HardFault if this is the case. When the compiler option is not activated
(debug and develop compilation profiles), the compiler generates LDR
instruction instead which does not cause a HardFault.
The ARM v7-M states page B3-601: "Unaligned load-store multiples and
word or halfword exclusive accesses always fault."
To face that problem, we check if the data pointer is aligned or not. If
it is, we apply the same algorithm than before. If not, a local variable
is created and we copy in it, byte per byte, the contents at the
unaligned pointer. However, it will impact performances adding 8
instructions (one LD and one ST for each copied byte).
Change-Id: I11f6e82ce5521960d2ecf499f718f76fec29c0b0
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patch fixes a memory bug. `eth_arch_enetif_init` method call
would attempt to write to un-initialized area of memory.
Change-Id: I9881de71d58fa14db609fe3e24617a210b896471
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
I added the function declarations of Ethernet functions that have a WEAK attribute. Although several Ethernet functions was called in rza1_emac.c, GR-LYCHEE don't have Ethernert feature. But there may be case that GR-LYCHEE uses LWIP feature.
In this case, since GR-LYCHEE will occur the build error, I addressed the error by defining the functions with a WEAK attribute. For reason of WEAK attribute, there is no influence in GR-PEACH and VK_RZ_A1H that have Ethernet feature.
I modified the debug message when using LWIP in RZ/A1 related mbed boards.
In eth_arch_enetif_init(), sys_thread_new() was called and task name is appeared as debug information, but task name for debug was a mistake.
For LWIP communication speedup in RZ_A1 related, I changed the below macro value and added the definition processing in RZ/A1 related header file(lwipopts_conf.h). For this reason, those macros are overrode by RZ/A1 related values, not default values.
In the below "features/FEATURE_LWIP" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related. And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "features/FEATURE_LWIP" folder
<before>
\features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_RZ_A1H
\features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_VK_RZ_A1H
<after>
\features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_RZ_A1XX
Update the code to check all addresses for all interfaces. Move
the code from mbed_lwip_socket_bind() to a new function called
mbed_lwip_is_local_addr()
Return NSAPI_ERROR_PARAMETER when:
Binding to a non-local address
Socket listen() is called without calling bind() first
Socket accept() is called without calling listen() first
The K64F Ethernet driver installs an interrupt handler that sets thread
flags, and this could be called before the thread was initialised, so it
would use a NULL thread ID.
This triggers an RTX error-checking trap in debug builds, and could also
lead to other problems with received packets not being processed.
Adjusted so the RX interrupt handler does nothing if the thread isn't
initialised yet, and manually trigger a RX event flag after initialising
the thread in case any interrupts were ignored.
An alternative would have been to implement eth_arch_enable_interrupts,
but this mechanism is not present in the EMAC world - drivers will have
to start returning interrupts in their power up.
Fixes#5680