* Add STM32F103xD, STM32F103xG series and fix STM32F103xE startup file
* Add system_clock.c file for STM32F103xD series
* Add STM32F103xD and STM32F103xG to targets.json
* Update CMakeLists.txt to add STM32F103xD and STM32F103xG series
add_subdirectory(TARGET_STM32F103xD EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_STM32F103xG EXCLUDE_FROM_ALL)
* Add remaps for STM32F1 timers as in original mbed-os
Added extra remaps for timers 9 to 14 for STM32F1 needed in STM32F103xG series
#define AFIO_REMAP_TIM9_ENABLE 17
#define AFIO_REMAP_TIM10_ENABLE 18
#define AFIO_REMAP_TIM11_ENABLE 19
#define AFIO_REMAP_TIM13_ENABLE 20
#define AFIO_REMAP_TIM14_ENABLE 21
---------
Co-authored-by: Perez <maperez@hp.com>
* STM32F7: Unconditionally enable QSPI workarounds
On the STM32769NI at least this patch is required for stable QSPI use.
Enable it uncondtionally in case other boards need it too.
Further discussions:
https://github.com/ARMmbed/mbed-os/issues/10049https://github.com/ARMmbed/mbed-os/issues/15108https://github.com/STMicroelectronics/STM32CubeF7/issues/52https://github.com/STMicroelectronics/STM32CubeF7/issues/82
* QSPIF: Attempt 4-byte addressing on Macronix chips
mbed-os PR 11531 introduced 4-byte addressing in the QSPIF block device:
https://github.com/ARMmbed/mbed-os/pull/11531
During testing it was found that this code broke on the NRF52840_DK and
DISCO_F769NI.
The NRF52840_DK controller seems unable to handle 4-byte addressing at
all and has been disabled entirely in another code section.
The DISCO_F769NI breakage was attributed to the flash chip but after more
research I believe this is related to the QSPI controller, not the 4-byte
addressing itself.
Now that the QSPI controller has a workaround, enable 4-byte addressing
again and hope it works fine this time.
* Add STM32F103xD, STM32F103xG series and fix STM32F103xE startup file
* Add system_clock.c file for STM32F103xD series
* Add STM32F103xD and STM32F103xG to targets.json
---------
Co-authored-by: Perez <maperez@hp.com>
* Start porting to Teensy 4.1, also fix some compiler warnings in FSL HAL
* Add hardware init for Teensy, refactor phy drivers, rework IMX EMAC autonegotiate code
* Revert some testing changes
* Fix incorrect phy address used outside of low_level_init_successful()
* Ethernet operational!
* Turn off DEBUG_IMX_EMAC
* Style fixes
* Style again
* Bugfix: mbed_lib.json files in project source dir were not getting picked up
* Bugfix: CLion debug configurations not generated properly due to variables going out of scope
* Support Teensy OTP MAC address
* Add clock settings for H725xE
* Correction of memory mapping for H725xE
* Added new target WIO_H725AE
* Added WIO_H725 into targets.json
* Added upload methods file for WIO_H725
* Licence filled from original source file
* Space alignment
* Added macro MBED_SPLIT_HEAP for MCU_STM32H725xE
* Typo correction
* Correction of upload methods for WIO_H725AE
* Fix incorrect image length in header preventing boot
* Fix ncache region being located in SEMC even on boards without it
* Don't reserve RAM for ncache anymore
* Fix crash when activating BufferedSerial on Teensy D0 and D1. Also fix incorrect daisy register mapping.
* Fix missing space in linker script
* Start on fixing incorrect MIMXRT clock frequency
* LPM working!
* Clean up LPM and clocking
* Add teensy model identifier
* Fix license headers
* device ram size is 40 kb, not 48 kB
in total RAM+RAM1 it has 48 kB, but the regions are not continous.
This error is also arm-pack index.json
* add section for CCM
* add target Blackpill-F411CE
* correction of Blackpill-F411CE
* add Blackpill to targets.json
* correction of STM32F411xE system_clock.c
* Update BLACKPILL_F411CE.cmake
Typo
* Update PinNames.h
LED correction
* Update PinNames.h
* Update BLACKPILL_F411CE.cmake
Correcting the wrong name in the Note2 about pyOCD.
* Update BLACKPILL_F411CE.cmake
Updated notes - an external debugger is required
* Initial attempt at Teensy 4.0 support
* Hide internal target
* Fix some targets.json issues, add boot code for the MIMXRT1060_EVK. It boots but tests aren't able to run properly yet.
* Disable LPTICKER on MIMXRT1060, fix pin names for newer dev kits
* Enable MIMXRT106x ethernet
* Fix for calculating CAN timing settings.
NominalPrescaler value needs to be as high as possible to ensure a good approximation of the target CAN speed.
Previous usage of macro IS_FDCAN_DATA_TSEG1 refers to (unsupported by Mbed ) FDCAN CAN controller settings and leads to too low prescaler values.
Usage Macro IS_FDCAN_NOMINAL_TSEG1 yields optimum results.
See also correct macro usage in line #158.
* Add complete support of DHCP relay interface ID option
RFC3315 specifies the following: "The relay agent MAY send the Interface-id
option to identify the interface on which the client message was received.
If a relay agent receives a Relay-reply message with an Interface-id
option, the relay agent relays the message to the client through the
interface identified by the option."
The current implementation of the DHCP relay reply handling, the interface
ID field from the server response is ignored. Managing the interface ID
is very important especially as DHCP requests/replies use link-local
addresses. The consequence of this is that the interface must always be
specified because the routing layer cannot guess the correct interface.
Moreover, Mbed provides a mechanism to enable/disable the interface ID
option on a DHCP relay instance, so it is important to fully support it.
The reason why this issue has not been discoverd until now is that the DHCP
relay is mainly used on systems that use only one interface (such as Wi-SUN
routers). By default, when no interface ID is specified for the socket, the
latter will choose 6loWPAN interface by default. This means that if two
interfaces are used on the same device, the 6loWPAN interface is always
selected.
The commit adds code to retrieve the interface-id value contained within
the DHCP relay reply message and write it to a control message header
that is added to the socket message. This tells the socket which
interface to choose. If the interface-id option is not enabled on the
relay, this procedure is simply ignored.
* Support Nuvoton target NUMAKER_IOT_M467
1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
2. Continuing above, tweak BSP:
(1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c).
(2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
3. Target NuMaker-M467HJ V0.1 board temporarily
4. Support Arduino UNO form factor for NUMAKER_IOT_M467 target
5. Enable export to Keil/IAR project
- tools/arm_pack_manager/index.json
- tools/export/iar/iar_definitions.json
* M467: Fix Greentea reset_reason test failure
HRESETRF is combined reset flag. Filter it out to avoid interference with reset reason check.
* M467: Support HyperRAM
1. For GCC, support multi-block .data/.bss initialization
2. HyperRAM is mapped to two regions: 0x0A000000 and 0x80000000
According to default system address map, 0x0A000000 is located at 'Code' region and 0x80000000 at 'RAM' region.
With MPU enabled on Mbed OS, 'Code' region is write-never and 'RAM' region execute-never.
0x80000000 is chosen because 'RAM' regioin is naturally for HyperRAM.
3. Configurable multi-function pins for HBI
4. To locate code/data at external HyperRAM:
- Specify __attribute__((section(".text.nu.exthyperram"))) for RO/.text/readonly section type
Invoke mbed_mpu_manager_lock_ram_execution()/mbed_mpu_manager_unlock_ram_execution() to run HyperRAM code
- Specify __attribute__((section(".data.nu.exthyperram"))) for RW/.data/readwrite section type
- Specify __attribute__((section(".bss.nu.exthyperram"))) for ZI/.bss/zeroinit section type
5. Add readme
* Config for M460 EMAC
* Add M460 EMAC driver
* Adjust M460 EMAC RX/TX buffer
* M467: Fix EMAC compile error with IAR
* M467: Support Crypto SHA/ECC H/W
1. Prepare crypto common code
2. Support list
- SHA
- ECC
NOTE: AES/RSA are to support in other works
NOTE: Compared to M487, M467's SHA supports context save & restore (DMA Cascade mode) and so no software fallback is needed.
NOTE: M467's ECC, following M487, goes partial-module replacement and it can just improve primitives e.g. point addition/doubling by 2X,
and cannot improve high level point multiplication because MbedTLS doesn’t open it.
To improve performance best, full-module replacement is needed.
NOTE: Continuing above, add support for Montgomery curve
* M467 H/W AES self-test pass
* M467 Support crypto GCM H/W
* M467: GCM support one simple mode instead of using composite GHASH & CTR MODE
* Update M467 AES-GCM to pass AWS-IoT test
* Update M467 AES-GCM for H/W gcm in-buffer creteria
* M467: Improve Crypto H/W wait helper routine
Add crypto_xxx_wait2 helper routine to replace crypto_xxx_wait for Crypto H/W control
* M467: Seed PRNG with TRNG for SCAP
According to TRM, it is suggested PRNG be seeded by TRNG on every Crypto H/W reset.
* M467: Support Crypto RSA H/W
1. Crypto RSA H/W supports 1024/2048/3072/4096 key bits. Fall back to software implementation for other key bits.
2. For decrypt, if MBEDTLS_RSA_NO_CRT isn't defined, go CRT, or normal.
3. For decrypt, when blinding (f_rng != NULL), enable SCAP mode.
4. Recover from Crypto RSA H/W failure:
(1) Enable timed-out wait to escape from RSA H/W trap
(2) On RSA H/W timeout, stop this RSA H/W operation
(3) Fall back to S/W implementation on failure
NOTE: RSA 4096 key bits can fail with default mbedtls configuration MBEDTLS_MPI_MAX_SIZE.
Enlarge MBEDTLS_MPI_MAX_SIZE to 1024 or larger if this feature is required.
NOTE: Fixed in BSP RSA driver, for non-CRT+SCAP mode, temporary buffer for MADDR6 requires to be key length plus 128 bits.
NOTE: Fixed in BSP RSA driver, DMA buffer must be 4-word aligned, or RSA H/W will trap.
* M467 Support crypto AES-CCM H/W with one-shot & cascade mode
* M467: Support Crypto ECC H/W in full-module replacement
1. Replace ecp.c full-module, and other ec modules dependent on ecp.c (ecdh.c/ecdsa.c/ecjpake.c) will improve followingly.
2. Recover from Crypto ECC H/W failure:
(1) Enable timed-out wait to escape from ECC H/W trap
(2) On ECC H/W timeout, stop this ECC H/W operation
(3) Fall back to S/W implementation on failure
3. Support Short Weierstrass curve
4. Support Montgomery curve
Montgomery curve has the form: B y^2 = x^3 + A x^2 + x
(1) In S/W impl, A is used as (A + 2) / 4. Figure out its original value for engine.
2eb06e7620/connectivity/mbedtls/include/mbedtls/ecp.h (L219-L220)
(2) In S/W impl, B is unused. Actually, B is 1 for Curve25519/Curve448 and needs to configure to engine.
2eb06e7620/connectivity/mbedtls/include/mbedtls/ecp.h (L221-L222)
(3) In S/W impl, y-coord is absent, but engine needs it. Deduce it from x-coord following:
https://tools.ietf.org/id/draft-jivsov-ecc-compact-05.htmlhttps://www.rieselprime.de/ziki/Modular_square_root
NOTE: Fix Curve448 has wrong order value
https://github.com/Mbed-TLS/mbedtls/pull/5811
* M467: Disable SCAP in RSA H/W
This is to follow designer's resolution.
* M467: support fullspeed usb device
* M467: Fix mbedtls_ecp_point_cmp() call with null argument
Guard from null argument passed to mbedtls_ecp_point_cmp() in ECC H/W port
* M467: Make mbedtls H/W port removable
Some M460 chips don't support AES/SHA/ECC/RSA H/W.
Make them removable from mbedtls H/W port through '"target.macros_remove": ["MBEDTLS_CONFIG_HW_SUPPORT"]'.
* Added TMPM4NR Platform
New Platform for Toshiba Added
* Removed UTF8 Chars
* M467: I2C: Fix potential role switch failure
Fix in i2c_do_trsn(), interrupt doesn't change back to enabled due to premature return.
* M467: Exclude UNO SPI pins from FPGA CI Test Shield test
UNO D8/D9/D10/D11/D12/D13 can wire to on-board SPI flash.
Exclude these pins from FPGA CI Test Shield test.
* M467: Adjust UART pinmap to pass FPGA CI Test Shield test
* M467: Support NuMaker-IoT-M467 board
Pinout comparison between NuMaker-M467HJ and NuMaker-IoT-M467 boards:
1. UNO are unchanged
2. LEDs are unchanged
3. Buttons are unchanged, except button names
4. NuMaker-M467HJ has HBI but NuMaker-IoT-M467 does
5. NuMaker-M467HJ doesn't have ESP8266 but NuMaker-IoT-M467 does
6. SDHC are unchanged
* Nuvoton: I2C: Fix potential role switch failure
Fix in i2c_do_trsn(), interrupt doesn't change back to enabled due to premature return.
Fix targets:
- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
- NUMAKER_PFM_M487/NUMAKER_IOT_M487
- NUMAKER_IOT_M252
- NUMAKER_IOT_M263A
- NU_M2354
* Update can_api.c
Modified comment as discussed.
* M467: Remove invalid UTF-8 byte sequence
* Replace MAX32660, MAX32670 I2C driver with final one in MSDK
- apply clang-format
- Fix i2c repeated start issue
Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>
* Add proper support for NUCLEO-H723ZG.
- add board specific EMAC setup to connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7
- stm32h7_eth_init.c was derived from the NUCLEO-H743ZI2 code whilst comparing to the output of STM32CubeIDE
- complete board specific code in targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG
- PeripheralPins.c and PinNames.h were created by targets/TARGET_STM/tools/STM32_gen_PeripheralPins.py
- ST ZIO connector pins in PinNames.h have been adapted from NUCLEO-H743ZI2
- CONSOLE_TX and CONSOLE_RX have been interchanged in PinNames.h to match the actual board layout
- startup_stm32h723xx.S was derived from startup_stm32h743xx.S
- stm32h723xg.ld was completely rewritten to match the actual MCU including:
- split heap support
- SRAM2 and SRAM4 support
- crash dump support
- proper use of DTCM as stack
- system_clock.c has been changed to support the maximal main clock speed of 550 MHz
- fix handling of HS in FS mode for the target board in targets/TARGET_STM/USBPhy_STM32.cpp
- add board definition to targets/targets.json and correct linker setup for the chip
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
* Fix I2C for MCU_STM32H723xG
Add I2C configuration to MCU_STM32H723xG in target.json as suggested by @jeromecoutant.
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
* Correct MAX32620 boards macro for USB library.
* Limit NUCLEO_H723ZG toolchain to GCC_ARM
Limit NUCLEO_H723ZG toolchain to GCC_ARM only.
This is the only toolchain this target has been tested with yet.
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
* M2354 support FS-USBD and update TF-M for USB PHY select
* Rethink STM32 I2C v2 HAL
* Add documentation for I2C_EVENT macros
* Add some additional I2C error codes
* Added TMPM4GR Platform
New Platform for Toshiba Added
* Resolve delimeter issues for target.json
* Fix compile error on static pinmap targets
* github: Fix click version
Signed-off-by: Martin Kojtal <martin.kojtal@arm.com>
Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
Signed-off-by: Martin Kojtal <martin.kojtal@arm.com>
Co-authored-by: chdelfs <109847651+chdelfs@users.noreply.github.com>
Co-authored-by: YannCharbon <yann.charbon@ik.me>
Co-authored-by: Chun-Chieh Li <ccli8@nuvoton.com>
Co-authored-by: cyliangtw <cyliang@nuvoton.com>
Co-authored-by: Deepak V. Shreshti <DeepakVS@TOSHIBA-TSIP.COM>
Co-authored-by: Martin Kojtal <martin.kojtal@arm.com>
Co-authored-by: Sadik.Ozer <sadik.ozer@analog.com>
Co-authored-by: Daniel Starke <daniel-email@gmx.net>
Co-authored-by: Ahmet Alincak <Ahmet.Alincak@maximintegrated.com>
Co-authored-by: Jamie Smith <smit109@usc.edu>
Co-authored-by: Jamie Smith <jsmith@crackofdawn.onmicrosoft.com>
* Initial attempt at rethinking the STM32 I2C v2 HAL. Makes single-byte work properly and adds a new 'state' variable to track what the hardware is doing.
* Fix some initial test failures
* Fix incorrect logic
* Fix more incorrect logic
* Tabs to spaces
* Fix repeated starts with single-byte API
* Fix race condition causing stop() after nacked address to sometimes break things
* Fix missed i2c structs that should have been removed
* Fix doing a repeated start from single-byte to transaction API causing I2C peripheral to lock up
* Fix xferOperation being set wrong for repeated starts, causing the peripheral to hang
* Fix race condition with repeated start after single-byte operation
* Fix compilation for targets that use I2C IP v1
* Fix initialization of XferOperation for API v1, optimize stop()
* Remove unneeded line
* Add docs for I2C events
* Add upload target for Arduino Nano 33 BLE, fix linker script preprocessing, add option for USB serial by default
* astyle error
* Use HINTS instead of PATHS so that the Arduino dir is searched first
* Enable OpenOCD and PyOCD for Nano 33 BLE in SWD mode
* Fix missing dependency for USB tests on Windows
* Add RAM defines for nrf52840
* Fix mbed-storage-kv-config depending on SD card library even if said library was not enabled
* Update dsrdtr value
* No longer need to modify linker script now that we aren't using whole-archive!
* Add OPENOCD_ADAPTER_SERIAL
* Add handling for cmsis dap
* Fix typo
* Fix weak symbol issue causing Bluetooth to not work. In this case, the weak implementation can simply be removed, because there's no legitimate case where it is used.
* First attempt at converting to OBJECT libraries. Not working due to more object library limitations
* Only compile the main libraries as OBJECT, because that's all that CMake can be made to do right now.
* Fix availability of target-specific flags
* Missed some usages
* Fix some STM32 ethernet stuff that was not linking correctly
* More fixes for STM32 ethernet and weak symbols
* Fix prebuilt object file linking for MUSCA_S1
* Fix STM32 eth init license headers
This PR adds the cmake config for upload method of Nucleo-F446RE
All methods have been tested (only for flash), but for soem reason ST-link metho is not stable.
Jamie Smith
Janco
Jookia
JohnK1987
JojoS
Jay Sridharan
Jamie Smith