Commit Graph

566 Commits (02936376ae5c3652823d2d63afae3a93e45cbc4d)

Author SHA1 Message Date
Lingkai Dong 427c7db627 mbed_rtx_idle: fix ticker macro checks
If a ticker is unavailable, its macro is undefined and cannot
be checked with MBED_STATIC_ASSERT.
2019-05-16 17:13:18 +01:00
Lingkai Dong 9f12e55340 SysTimer: default to us ticker if lp ticker is unavailable 2019-05-16 16:14:26 +01:00
George Beckstein 5ced28359b
Change "aplication" to "application" 2019-05-13 17:59:03 -04:00
Oren Cohen 73ddfa9f88 Call psa_spm_init() before staring the NS core 2019-04-29 16:42:33 +03:00
Martin Kojtal 5fb5e9808c
Merge pull request #10367 from jeromecoutant/PR_STACK_SIZE_DEBUG
Increase background stack size to fix overflows with debug profile
2019-04-17 15:52:38 +01:00
Martin Kojtal 14b9229b13
Merge pull request #10415 from 0xc0170/fix_licenses
rtos/drivers: add license information
2019-04-17 12:26:43 +01:00
Martin Kojtal 94898a12ab
Merge pull request #10358 from kjbracey-arm/error_print_improvements
Error print improvements
2019-04-17 08:04:15 +01:00
Martin Kojtal 5a96f45ce0 license: fix files list 2019-04-16 11:43:14 +01:00
Martin Kojtal 393707f2b8 rtos: add license information 2019-04-16 11:26:39 +01:00
Kevin Bracey b8e80dd2fb Don't trap RTX errors or mutex errors during errors
Once a fatal error is in progress, it's not useful to trap RTX errors
or mutex problems, so short-circuit the checks.

This makes it more likely that we may be able to get the console
initialised if it is being written to for the first time by `mbed_error`
in a difficult context - such as an RTX error callback from inside an
SVCall.

For example, the one-line program

   osMutexAcquire(NULL, 0);

will generate an RTX error trap, then `mbed_error` will try to call
`write(STDERR_FILENO)` to print the error, which will prompt mbed_retarget to
construct a singleton `UARTSerial`. This would trap in the mutex
for the singleton or the construction of the UARTSerial itself, if
we didn't allow this leniency. If we clear the mutex checks, then
`UARTSerial::write_unbuffered` will work.
2019-04-15 11:29:04 +03:00
Cruz Monrreal 582edf503a
Merge pull request #10366 from kjbracey-arm/feature_CMSIS_5_ca812421
Update CMSIS to 5.5.1
2019-04-11 20:34:00 -05:00
Cruz Monrreal b1e48db242
Merge pull request #10225 from kjbracey-arm/memorypool_blocking_alloc
Mail/MemoryPool: blocking alloc
2019-04-11 20:21:44 -05:00
jeromecoutant 9b2ba12c62 Increase background stack size to fix overflows with debug profile 2019-04-11 16:50:49 +02:00
Kevin Bracey 49928ec143 Adjust EVR_RTX disable macros for 5.5.1 2019-04-10 15:47:43 +03:00
Bartek Szatkowski d55698ec88 CMSIS/RTX: Pre-processor defines used for assembly
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.

1. Patch RTX so irq_cm4f.S files work with no FPU targets
2. Patch RTX so irq_armv8mml.S files to work with and without FPU
2. Patch RTX so irq_armv8mml.S and irq_armv8mbl.S files to work with secure and
   non-secure builds

(cherry picked from commit 094662790a)
2019-04-10 14:42:56 +03:00
deepikabhavnani 9144ecc08c CMSIS/RTX: Move Idle and Timer thread stack to bss section.
In case of ARM compiler, idle and timer thread stack though assigned
to `.bss.os` section since not zero initialized are part of `data` section.

In this commit, we are moving stacks of idle and timer thread to bss
section and thereby saving ROM space.

(cherry picked from commit ba92372b8d)
2019-04-10 14:42:52 +03:00
Bartek Szatkowski b8408bc231 CMSIS/RTX: Fix using FALSE/TRUE with preprocesor
(cherry picked from commit 1752803626)
2019-04-10 14:42:21 +03:00
Bartek Szatkowski 1aab93ac98 CMSIS/RTX: Allow overwriting mutex ops for ARMC
(cherry picked from commit b88254809e)
2019-04-10 14:42:06 +03:00
Bartek Szatkowski 4edb719624 CMSIS/RTX: Patch RTX4 to preserve osThreadDef compatibility
mbed OS used older RTX4 version and with osThreadDef accepting only 3
parameters, to preserve compatibility we hardcode the 'instances'
parameter to 1.

(cherry picked from commit 428acae1b2ac15c3ad523e8d40755a9301220822)
(cherry picked from commit 4360b7bbf8)
2019-04-10 14:41:48 +03:00
Kevin Bracey 00c9005b4e [CMSIS_5]: Updated to ca812421 2019-04-10 14:41:35 +03:00
Martin Kojtal 43cbc10616
Merge pull request #10020 from TacoGrandeTX/fix_iar_single_threaded
Fix single-threaded apps for IAR v8 builds
2019-04-08 10:38:42 +02:00
Kevin Bracey e2a965fe1e Mail/MemoryPool: blocking alloc
Mail and MemoryPool did not permit access to the blocking form of
allocation available in CMSIS-RTOS 2 - give them new blocking methods.
2019-03-26 14:12:59 +02:00
Kevin Bracey b7171d1bbf RTOS API: minor tidies
Remove unneeded memsets and an unneeded cast.

Add missing initialisation of EventFlags attributes - no all fields were
being initialised.
2019-03-18 17:27:07 +02:00
RFulchiero 0562128998 Fix single-threaded apps for IAR v8 builds
For single-threaded apps __iar_Initlocks() is not required and must
not be called because the proper IAR library is brought in only if
"--threaded_lib" is defined in the linker command.
2019-03-08 15:33:04 -06:00
Martin Kojtal e75794ec6e
Merge pull request #9888 from ARMmbed/feature-armc6
ARM Toolchain update to ARM Compiler 6.11(ARMC6)
2019-03-04 12:23:38 +01:00
deepikabhavnani a9ce4b3d9a Target_WIZWIKI: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:52:06 -06:00
deepikabhavnani 7f6b4e51a3 Microlib only supports the two region memory model
Update arm_std.c and linker scripts to use ARM_LIB_STACK
and ARM_LIB_HEAP section from scatter files, instead of user
defined symbols
2019-02-28 19:52:06 -06:00
Cruz Monrreal e393c2dc0b
Merge pull request #9785 from c1728p9/default_to_us_ticker
Use us ticker for tickless on devs with wrapper
2019-02-28 18:25:01 -06:00
Kevin Bracey 0adc7dc927 RTX5: Make rtx_core_ca.h cope with compiler in Thumb mode
Assembler in rtx_core_ca.h is on the whole unified syntax such that it
should work fine if assembled as either ARM or Thumb-2.

The exception was __get_PSP, which uses STM^, which is only available
in ARM state.

Flagging for this function was incorrect, except for IAR - it switched
assembler state without telling the compiler, meaning that the resulting
assembler output could be incorrect, and that the function itself would
not be correctly marked as an ARM function - the CPU would enter in
Thumb state.

Alternative fix would be to switch to System mode, which would work
as either ARM or Thumb-2 assembler, like the rest of the file, but
this is the minimal change.

Fixes #526.
2019-02-28 11:55:20 -06:00
d-kato 0ef1620ffb Back to the original : "rtx_core_ca.h" 2019-02-28 11:55:19 -06:00
d-kato 7aebee07b1 GR_LYCHEE,RZ_A1H,VK_RZ_A1H: Update to fix ARMC6 build failures 2019-02-28 11:55:19 -06:00
Cruz Monrreal 3352b431b3
Merge pull request #9786 from c1728p9/tickless_optimization
Optimize tickless tick computation
2019-02-26 23:22:04 -06:00
Cruz Monrreal e1736cd06f
Merge pull request #9571 from mprse/fix_9523_rtos_less_issue
Update to 2-region model for HEAP and Stack Memory
2019-02-26 22:50:19 -06:00
Russ Butler f6ed7cee41 Optimize tickless interrupt latency
Remove unnecessary critical sections from the SysTimer code since
the access should already be serialized.
2019-02-23 17:44:51 -06:00
Russ Butler d43ca21ec5 Optimize tickless tick computation
Optimize the tick computation in the following ways:
1. Use relative time rather than absolute time
2. Replace multiplication/division pair with just multiplication
    or division:
    "* 1000000ULL / OS_TICK_FREQ"   ->   "* US_IN_TICK"
    "* OS_TICK_FREQ / 1000000"      ->   "/ US_IN_TICK"
2019-02-23 17:44:29 -06:00
Russ Butler d901c51056 Apply astyle fixes
Apply the fixes found from astyle.
2019-02-21 18:43:59 -06:00
Russ Butler b32b996419 Use us ticker for tickless on devs with wrapper
The low power ticker wrapper layer adds a large amount of interrupt
latency. This can cause dropped bytes at a baud of 115200 on some
devices. To prevent this by default use the microsecond ticker for
tickless on devices which make use of the low power ticker wrapper.
2019-02-21 10:51:10 -06:00
Martin Kojtal baed84a109
Merge pull request #9670 from kegilbert/timeout_units
Add units to timeout argument in EventFlags
2019-02-21 15:53:38 +01:00
kegilbert f1abca35cf Change EventFlag timeout paramter
Matches rest of RTOS class timeout parameters by using the unit name. Remove ambigious statement in reference to 0 ms being no-timeout as a timeout of 0 causes the function to not block and return immediately (osWaitForever is used as no timeout as it will wait forever)
2019-02-20 17:52:28 -06:00
Deepika f13a3e32b6 Fix GCC _sbrk allocation 2019-02-19 15:49:49 -06:00
deepikabhavnani b36147fbe9 ISR_Stack_start/size defines are not needed, use linker file defines 2019-02-19 15:49:49 -06:00
deepikabhavnani 9d1ce66b14 ISR_STACK_START/ HEAP_START defines not used by GCC_ARM toolchain 2019-02-19 15:49:49 -06:00
Deepika 537b3646d3 Resolve build/type cast errors 2019-02-19 15:49:49 -06:00
Deepika 41eaefeeb4 Update memory model for stack and heap memory
Memory model for RTOS and No RTOS was initially single stack and heap,
only few targets implemented 2-region RAM model.

2-region RAM model is applied for all toolchains and targets.

GCC: __wrap__sbrk was implemented for 2-region ram model, with switch to 2-region
for all targets, we do not need target specific implementation of this API
Also _sbrk is WEAK function, hence can be over written in target folder for
special cases
2019-02-19 15:49:45 -06:00
Deepika a1fe75093e Interrupt stack is always explicitly specified, hence other condition is not needed
Earlier if interrupt stack is specified it was used and remaining section of
IRAM was used to allocate heap, if stack is not specified heap section was
reduced by isr stack size and it was added at the end of RAM

With 2-region RAM support interrupt stack will always be specified.
2019-02-19 15:46:32 -06:00
Oren Cohen 5dbb8fef09 Call tfm_ns_lock_init() on TFM NSPE boot 2019-02-19 15:19:02 +02:00
Oren Cohen 34895a05ad CR fixes 2019-01-31 17:17:54 +02:00
Oren Cohen 8841ba69f8 Align to new spec changes and prep for TFM SPM
# Conflicts:
#	components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/psa_crypto_spm.c
#	components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c
2019-01-31 17:17:53 +02:00
Bartek Szatkowski 094662790a CMSIS/RTX: Pre-processor defines used for assembly
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.

1. Patch RTX so irq_cm4f.S files work with no FPU targets
2. Patch RTX so irq_armv8mml.S files to work with and without FPU
2. Patch RTX so irq_armv8mml.S and irq_armv8mbl.S files to work with secure and
   non-secure builds
2019-01-18 17:39:43 -06:00
Deepika bb25e8660d Reverted 4 CMSIS/RTX commits for Assembly files
1. Revert "CMSIS/RTX: __FPU_USED to be set based on HW FPU support"
This reverts commit b4f5bed7e75c21927c954a50d40422b81a1de5a0.

2. Revert "CMSIS/RTX: Update Armv8M IAR 8.x assembly files - add END"
This reverts commit b228cd9db0.

3. Revert "CMSIS/RTX: Pre-processor defines used for assembly"
This reverts commit 287121ffdc.

4. Revert "CMSIS/RTX: Patch RTX so irq_cm4f.s files work with no FPU targets"
This reverts commit cc2e0517e1.
2019-01-18 17:31:42 -06:00