mbed-os

Commit Graph

Author	SHA1	Message	Date
Cyprien Laplace	65fa7b6923	LPC81X: reduce code size and add ARM_GCC support LPC810 has only 4KB of flash, thus avoiding dead code is really nice. Here the NVIC interrupt setup was pulled from the us_ticker code even if no code is using timer events. This also adds ARM_GCC support for TARGET_LPC81X. LPC81X and LPC82X support Cortex M0+ VTOR register, so it is not necessary to put non-init text at 0x200.	2015-08-16 21:35:08 -04:00

Author

SHA1

Message

Date

Cyprien Laplace

65fa7b6923

LPC81X: reduce code size and add ARM_GCC support

LPC810 has only 4KB of flash, thus avoiding dead code is really nice.
Here the NVIC interrupt setup was pulled from the us_ticker code even
if no code is using timer events.

This also adds ARM_GCC support for TARGET_LPC81X.

LPC81X and LPC82X support Cortex M0+ VTOR register, so it is not
necessary to put non-init text at 0x200.

2015-08-16 21:35:08 -04:00

1 Commits (01e730cfb2fe9d1404668ad1b4d9a2877b3abdda)