When doing so, do not disbale GPIO clocks as they may be used by other
drivers !
As a result, debug will be disabled by default, but can be enabled by
either modifying code or selecting MBED debug profile.
Issue was seen when running BLE_GAP example from
mbed-os-example-ble.
In STM32WB, the M0 core cannot be reset except if the whole target
is reset. So in case of re-initialization of the BLE stack, the
transport layer should not be initialized again. The HCI reset
command will do the job.
These files are not BLE specific, but also needed for some clock setting
for instance.
In order to compile an MBED2 application, we need to move the files.
- move hw_conf.h file to targets/TARGET_STM/TARGET_STM32WB directory as
this is used also out of BLE feature.
- create a dedicated hal_deepsleep function as the behavior in WB is a lot
different from other existing STM32 targets
- update clock tree configuration to directly clock the entire tree @ 32MHz
out of HSE. This is needed as we want to let the M0 core running without
any change on M0-side of clocks when M4 enters /exits deep sleep.
The STM32WB Coridio driver includes:
- the Cordio HCI driver handling the reset sequence. During reset sequence
the TX POWER level is set and the BD address is defined if found in OTP
or option bytes. The rest of the sequence is based on the standard CORDIO
HCI driver example.
- The Transport Layer part handles sending and receiving messages to the
WB controller running on cortex-M0 of the STM32WB target. The messages
are shared through shared memory and mailboxes system based on IPCC HW.
TARGET_CYW4343X Bluetooth HCI driver is specific to STM32 targets
derived from USI_WM_BN_BM_22. Move the driver implementation to
TARGET_STM folder to not interfere with Cypress implementation at
TARGET_Cypress/TARGET_CYW43XXX/HCIDriver.cpp that is enabled for
PSoC 6 targets which also include the CYW4343X label.
Laurent Meunier
bcostm
Volodymyr Medvid