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32 Commits (mbed-os-5.10)

Author SHA1 Message Date
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 b443a23b07 [NUC472/M487] Add memory barrier for DMA transfer in AES/DES alter. 2018-01-05 09:18:23 +08:00
ccli8 7d92550d11 [NUC472/M487] Remove superfluous code in AES alter. 2018-01-05 09:18:22 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-05 09:18:21 +08:00
ccli8 ac000244f4 [NUC472/M487] Refine AES/DES alter. DMA buffer requirement comment 2018-01-05 09:18:20 +08:00
ccli8 aafbdc8d38 [NUC472/M487] Fix compile error with disabled crypto 
For example, even though MBEDTLS_SHA512_C is disabled (via #undef MBEDTLS_SHA512_C),
mbedtls_sha512_context is still necessary due to referenced in sha512.h.
 2018-01-05 09:18:20 +08:00
ccli8 ba16fd9617 [NUC472/M487] Refine AES alter. key endianness code 2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 0c2d59d327 [NUC472/M487] Refine AES/DES alter. code 2018-01-05 09:18:19 +08:00
ccli8 289bbf0ec7 [NUC472/M487] Fix AES alter. CFB128 error 2018-01-05 09:18:19 +08:00
ccli8 7076675fec [NUC472/M487] Optimize AES alter. code 2018-01-05 09:18:19 +08:00
ccli8 6cc3aa3e54 [NUC472/M487] Guard from re-entry into crypto H/W 2018-01-05 09:18:19 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-05 09:18:18 +08:00
ccli8 f85875c7b6 [NUC472/M487] Fix AES alter. DMA buffer could locate at unsupported region 2018-01-05 09:18:18 +08:00
ccli8 70e9a90957 [NUC472/M487] Refine AES alter. input/output data endianness 2018-01-05 09:18:18 +08:00
ccli8 a1e202518f [NUC472/M487] Fix AES alter. DMA buffer check 2018-01-05 09:18:18 +08:00
ccli8 20aa516e79 [NUC472/M487] Refine config check code 2018-01-05 09:18:17 +08:00
ccli8 ed57432c95 [NUC472/M487] Add comment for AES alter. context 2018-01-05 09:18:17 +08:00
ccli8 9e5837fd77 [NUC472/M487] Refine AES alter. code with IV endianness 2018-01-05 09:18:16 +08:00
ccli8 087186aba7 [NUC472/M487] Rework AES alter. CFB128 
1. Fix bug on non-block aligned data size
2. More concise
 2018-01-05 09:18:16 +08:00
ccli8 93f6ef996f [NUC472/M487] Refine AES alter. DMA buffer code 2018-01-05 09:18:16 +08:00
ccli8 f24ca8c857 [NUC472/M487] Refine AES alter. code 2018-01-05 09:18:16 +08:00
ccli8 82bd285e51 [NUC472/M487] Support multiple contexts in AES alter. with context save & restore 2018-01-05 09:18:15 +08:00
ccli8 0d25a9c421 [NUC472/M487] Fix AES DMA buffer cannot locate at ROM region 2018-01-05 09:18:15 +08:00
ccli8 2dcc1e9e27 [NUC472/M487] Remove AES alter. dead code 2018-01-05 09:18:15 +08:00
ccli8 5665247d4a [NUC472/M487] Fix AES alternative function not thread-safe 2018-01-05 09:18:14 +08:00
ccli8 315b684bd9 [NUC472] Refine coding style 2018-01-05 09:18:14 +08:00
ccli8 61d9e69be4 [NUC472] Remove unnecessary MBEDTLS_CONFIG_FILE check from AES/DES/SHA alternative 
1. aes.h/des.h/sha1.h/sha256.h/sha512.h includes config.h before aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h.
2. aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h should not be included in any other location.
3. Just include aes.h/des.h/sha1.h/sha256.h/sha512.h in aes_alt.c/des_alt.c/sha1_alt.c/sha256_alt.c/sha512_alt.c.
 2018-01-05 09:18:13 +08:00
ccli8 6b0213c13d [NUC472] Remove other unnecessary AES alternative macro definitions 
As MBEDTLS_AES_ALT is defined, alternative implementations for all AES functions should be defined.
 2018-01-05 09:18:13 +08:00
ccli8 925eee0688 [NUC472] Remove debug code in AES alternative 2018-01-05 09:18:13 +08:00
ccli8 46cb684a32 [NUC472] Conform to mbed TLS H/W acceleration support 2017-08-01 14:40:08 +08:00