Commit Graph

20 Commits (feature-sdio)

Author SHA1 Message Date
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
Deepika 1f57568015 TARGET_Silicon_Labs Setup heap limit and size 2019-02-19 15:49:49 -06:00
Przemyslaw Stekiel d30a14e64f [Silicon_Labs] Support boot stack size configuration option 2019-01-08 15:32:06 +01:00
Deepika 08051f5c23 SiLabs: Fix alignment of execute region to 8-byte boundary
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
2018-10-09 10:15:07 -05:00
PHST 804edd578e Place "MBED_WEAK" for IAR-Toolchain before the type. 2018-07-17 08:12:41 +02:00
PHST de266d827e Added missing include. 2018-07-16 19:28:54 +02:00
PHST 1658349965 Replace __attribute__((weak)) with MBED_WEAK 2018-07-16 15:38:25 +02:00
PHST 95d78df962 EFM32 Make PeripheralPins.c configuration tables weakly defined to be overridable.
See issue "https://github.com/ARMmbed/mbed-os/issues/7424#issuecomment-404233377"
2018-07-16 11:48:53 +02:00
Cruz Monrreal fe43377939
Merge pull request #6947 from evva-sfw/hotfix/EFM32PG12_STK3402_Expansion_Header
EFM32PG12_STK3402 - Correct wrong Expansion-Header pin namings
2018-05-29 10:36:31 -05:00
PHST 69207457a0 EFM32PG12_STK3402 - Correct wrong Expansion header Pin naming
Referencing to "UG257: EFM32 Pearl Gecko PG12 Starter Kit User's Guide - Chapter 4" (https://www.silabs.com/documents/public/user-guides/ug257-stk3402-usersguide.pdf) it should be like in this commit.
2018-05-18 08:39:14 +02:00
Steven Cooreman e487043c11 Set up the ISR stack pointer in the right location on ARMCC
EFR32MG1, EFR32MG12 and EFM32PG12 didn't have a fixed ARMCC linker script yet.
2018-03-27 23:03:49 +02:00
amq fdc2274720 EFM32: make peripherals conditional
* MCUs within a family like EFM32GG can omit some peripherals, e.g. EFM32GG230 doesn't have UART
* This commit adds a check to make them compilable, relevant mainly for custom boards
2018-01-31 17:35:26 +00:00
Steven Cooreman 18c973f132 Allow overriding of DCDC settings per target
Allow custom targets to override the DCDC settings by defining EMU_DCDCINIT_STK_DEFAULT to target-specific initialization values.
2018-01-15 16:36:23 +01:00
Jimmy Brisson c7d6bbe295 Upcase all assembler file extensions 2017-06-20 14:50:08 -05:00
Martin Kojtal 8998a55bc7 Merge pull request #4475 from c1728p9/workshop_rebase_4043
Silicon Labs: Add bootloader support
2017-06-09 15:04:55 +01:00
Aksel Skauge Mellbye b30e665fc7 [Silicon Labs] Bugfixes to using bootloader with Series 1 devices. 2017-06-06 17:11:18 -05:00
Aksel Skauge Mellbye 5d906a74e6 [Silicon Labs] Add bootloader support
* Make memory sections configurable in linker files
* Dynamically determine vector location in flash for NVIC relocation
* Advertise bootloader support in targets.json
2017-06-06 16:26:11 -05:00
Kevin Gilbert 83a510751b Added mapping to BTN-labelled switches 2017-04-28 11:31:48 -05:00
Steven Cooreman ce843e4859 Update pinmap of EFM32PG12 as well 2017-04-06 19:35:10 +02:00
Steven Cooreman d710ec4e12 Bugfix for EFM32PG12 and EFR32MG12
* Off by one error in the linker scripts reserved one word too little for the vector table
* Re-apply uvisor changes to emlib. To allow uvisor to run, we should make accesses to the romtable through uvisor's secure read gateway
* Copypasta in target name (EFM32PG12, not EFR32PG12)
* Copypasta in the pin definitions (thanks @akselsm)
* Forgot to update PortName for extra ports on MG/PG12
2017-03-21 16:19:46 +01:00