Commit Graph

2128 Commits (feature-sdio)

Author SHA1 Message Date
Martin Kojtal 33e392e9d9
Merge pull request #11682 from mprse/fpga_tests_CI_targets
Make FPGA tests to pass on CI targets (SPI, analogIn, PWM)
2019-11-07 11:46:40 +01:00
Martin Kojtal 383cf1984d
Merge pull request #11711 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F7_V1.15.0
STM32F7 update drivers version to CUBE V1.15.0
2019-11-07 11:33:38 +01:00
Martino Facchin 8daa2d72ba [USB][STM32] Don't wrap direct function calls in MBED_ASSERT
dab09f3138 added checks on some functions in the form of MBED_ASSERT on the result.
Compiling with -NDEBUG elides the call, thus breaking the functionality

This patch restores it, while leaving the return check if compiled with standard profile.
2019-11-06 15:01:48 +01:00
jeromecoutant 7847ad79fb STM32F7 HAL CRYPT patch to add missing UNLOCK 2019-11-05 11:46:13 +01:00
jeromecoutant c6fdd4efb6 STM32H7 FLASH API issue with M4 core 2019-11-05 10:25:43 +01:00
Martin Kojtal a927ab8f7c
Merge pull request #11789 from jeromecoutant/PR_STM32H7
STM32H7: code and feature alignment for both NUCLEO and DISCO targets
2019-11-04 09:48:09 +01:00
jeromecoutant 356de44aed STM32F7 ARM SCT file update to define correct RAM_SIZE 2019-10-31 17:46:11 +01:00
jeromecoutant 4f788adeb9 STM32F7 refactor common files 2019-10-31 17:46:10 +01:00
jeromecoutant 52bfd0c99a STM32F7 updates for new driver version 2019-10-31 17:45:58 +01:00
jeromecoutant 8ac918975f F7 ST CUBE V1.10.0 => V1.15.0
https://www.st.com/en/embedded-software/stm32cubef7.html
2019-10-31 17:43:18 +01:00
jeromecoutant c7ca6f731c STM32H7 linker script files alignment 2019-10-31 14:59:18 +01:00
jeromecoutant 21ff11c3d3 STM32H7 alignment within family
- license header update
- STMOD+ connector pin addition
- update pin comment for Ethernet connector issue (DISCO_H747I)
- align files for each target
2019-10-31 14:38:37 +01:00
Martin Kojtal eea83007be
Merge pull request #11203 from Tharazi97/Watchdog_lower_limit_timeout_test
Add watchdog lower limit timeout test
2019-10-31 14:25:52 +01:00
jeromecoutant 0c740e7095 STM32H7: update PeripheralPin generation script and pin files accordingly 2019-10-31 14:11:00 +01:00
jeromecoutant d7d0d0b8cb STM32H7 FLASH and DEVICE_KEY
- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
  (default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
2019-10-31 13:04:49 +01:00
Martin Kojtal 73b4f717be
Merge pull request #11759 from LMESTM/stm_qspi_address
STM32 QSPI: Use defines for setting address size
2019-10-31 10:38:58 +01:00
Przemyslaw Stekiel ee519e6a5c NUCLEO_F411RE, NUCLEO_L073RZ, NUCLEO_F303RE: Disable Analogin D13(PA_5) pin.
Analogin test fails on D13(PA_5) pin. When logic one (3.3V) is provided on this pin ADC reads 0.86 value. On other pins we got 0.98.
This is caused because this pin is connected to led2.
2019-10-30 14:34:57 +01:00
Janne Kiiskila a48500183e Fix for the H747 flash driver / cache cleaning
This copies the approach of the STM32F7 flash driver submitted via
PR https://github.com/ARMmbed/mbed-os/pull/10248

With this change the board finally passes all of the device key
tests 10/10 times correctly.
2019-10-30 15:25:20 +02:00
Martin Kojtal a07286676b
Merge pull request #11756 from JammuKekkonen/add_ccmram_section_for_f303re
Add option to use CCMRAM on F303xE.
2019-10-30 09:10:42 +01:00
Jammu Kekkonen 4dc4bfff9a Add option to use CCMRAM on F303xE. 2019-10-29 12:54:27 +02:00
Laurent Meunier 28c908fdef STM32 QSPI: Use defines for setting address size 2019-10-28 15:38:53 +01:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Martin Kojtal 8637069b36
Merge pull request #11698 from kjbracey-arm/armstack
Clean up ARM toolchain heap+stack setup in targets
2019-10-24 11:37:11 +02:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
Martin Kojtal 9db54bc1ee
Merge pull request #11672 from ABOSTM/I2C_FASTMODEPLUS
STM32F767ZI - I2C FastModePlus not properly enabled
2019-10-22 09:46:16 +02:00
jeromecoutant dab09f3138 STM32 USB redesign step 1
No more need to explicitly configure each targets.
Pins are now defined in the PeripheralPin.c file which is build by a script.
2019-10-21 17:12:03 +02:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 0e1a04b64a STM32WB USB pins addition 2019-10-21 17:11:57 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
jeromecoutant 2c03f3a61e STM32L1 USB pins addition 2019-10-21 17:11:53 +02:00
jeromecoutant a54fdf7585 STM32L0 USB pins addition 2019-10-21 17:11:52 +02:00
jeromecoutant 40739d3b8f STM32H7 USB pins addition 2019-10-21 17:11:50 +02:00
jeromecoutant 905f81851a STM32F7 USB pins addition 2019-10-21 17:11:49 +02:00
jeromecoutant 6f0932033b STM32F4 USB pins addition 2019-10-21 17:11:27 +02:00
jeromecoutant 6986daac61 STM32F3 USB pins addition 2019-10-21 14:49:19 +02:00
jeromecoutant 9b3cdd0972 STM32F2 USB pins addition 2019-10-21 14:49:19 +02:00
jeromecoutant 6e3dc7b173 STM32F1 USB pins addition 2019-10-21 14:49:18 +02:00
jeromecoutant 66dea7b5da STM32F0 USB pins addition 2019-10-21 14:49:18 +02:00
jeromecoutant 5afd9ebb60 STM32 PeripheralPins.h update with USB 2019-10-21 14:49:18 +02:00
Martin Kojtal cd415cfb41
Merge pull request #11708 from ABOSTM/FIX_SPI_COMPILATION_WARNING
TARGET_STM: remove warning and fix typo on SPI
2019-10-21 09:40:23 +02:00
Martin Kojtal 42cb19b6d8
Merge pull request #11679 from jeromecoutant/PR_L4_TRNG
STM32L4 TRNG clock configuration
2019-10-21 09:39:24 +02:00
Martin Kojtal 4af05bb370
Merge pull request #11648 from rohfle/target-olimex-stm32e407
OLIMEX_STM32E407_F407ZG: Added new target platform
2019-10-18 16:05:05 +02:00
Martin Kojtal d851a63e46
Merge pull request #11602 from kyle-cypress/pr/qspi-arbitrary-alt-size
Allow for arbitrary QSPI alt sizes
2019-10-18 15:48:16 +02:00
Martin Kojtal 8ff5cf9216
Merge pull request #11700 from toyowata/arch_max_bootloader
Add bootloader support for Seeed Arch-MAX
2019-10-18 10:32:00 +02:00
Alexandre Bourdiol bca9d9500e TARGET_STM: remove warning and fix typo on SPI 2019-10-18 09:48:30 +02:00
Rohan Fletcher 4b971fbb8f OLIMEX_STM32E407_F407ZG: Added definitions for missing LEDs 2019-10-18 06:37:09 +13:00
Martin Kojtal dba8e77b8c
Merge pull request #11688 from LMESTM/Clearing_UART_TC_Flag_prevents_deepsleep
Clearing UART TC Flag prevents deep sleep, so do not clear it
2019-10-17 14:17:15 +02:00
jeromecoutant 7db11e0b20 STM32 TRNG clock configuration 2019-10-17 13:51:33 +02:00
toyowata 5389536953 Add bootloader support for Seeed Arch-MAX 2019-10-17 10:05:03 +09:00
Kyle Kearney 8e9877c212 Update STM driver changes for clarity
- Use a switch statement rather than shifting and masking to compute
  the AlternateBytes value.
- Rename rounded_size to alt_bytes to clarify its purpose.
2019-10-16 09:37:27 -07:00