Commit Graph

237 Commits (feature-chip)

Author SHA1 Message Date
Chun-Chieh Li 68df919e3f Nuvoton: Remove DISABLE/ENABLE macro definitions in BSP
These are not used on Mbed OS. Remove them to avoid name conflict with other modules.
2020-12-09 14:27:23 +08:00
Martin Kojtal 28eeee2b4c
Merge pull request #13922 from 0xc0170/cmake-nuvoton
CMake: add nuvoton targets
2020-11-27 11:02:53 +00:00
Martin Kojtal 0efffa3411 CMake nuvoton: fix ARMClang linker script command 2020-11-25 13:18:15 +00:00
Martin Kojtal 02c35fdd48 CMake: add nuvoton targets 2020-11-18 15:18:18 +00:00
pea-pod 507181d262 Change MBED_STATIC_ASSERTs version for built-in 2020-10-27 08:30:40 -05:00
cyliangtw ffee35a5c8 Fix NuMaker I2C timeout,
some H/W timer count is 24 bits only, hardcode 0xffffffff causing
  wrong judgement of timeout as while H/W timer counting overflow.
2020-09-29 21:01:18 +08:00
Martin Kojtal 468372e759
Merge pull request #13492 from talorion/fix-PwmOut-resets-after-suspend
Fix pwm out resets after suspend
2020-09-10 12:40:18 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
2020-09-10 10:08:38 +01:00
Chun-Chieh Li ce63a17212 Nuvoton: Fix degrading QSPI to SPI
In most cases, we can control degraded QSPI H/W to standard through BSP SPI driver directly as if it is just SPI H/W.
However, BSP SPI driver distinguishes among SPI H/W instances in below functions:
-   SPI_Open
-   SPI_Close
-   SPI_SetBusClock
-   SPI_GetBusClock
In these cases, we must change to QSPI version instead for QSPI H/W.

Change target:
-   NUMAKER_PFM_M487
-   NUMAKER_IOT_M487
-   NU_PFM_M2351*
2020-09-03 10:25:08 +08:00
talorion b03d80fd08 pwmout - fixed compile errors 2020-09-02 13:39:17 +02:00
talorion 05128898a5 pwmout - M480 - add read methods for period and pulsewidth 2020-09-02 13:39:13 +02:00
Martin Kojtal 8a254a9cc6
Merge pull request #12923 from OpenNuvoton/nuvoton_watchdog_lxt
Nuvoton: Refine more on watchdog HAL
2020-05-12 14:31:26 +02:00
Chun-Chieh Li 9e9e2f18de Nuvoton: Change WDT clock source to LXT
LIRC has 40%~50% error rate, so change WDT clock source to LXT from LIRC.

NOTE: NANO100 series just supports LIRC-clocked WDT.
2020-05-05 17:50:20 +08:00
Chun-Chieh Li f6485cf92f Nuvoton: Fix failure to change WDT clock source
WDT clock source selection and its enablement bits are protected. Add unlock sequence before write to them.
2020-05-05 17:50:15 +08:00
Chun-Chieh Li d121ea89d1 Nuvoton: Fix WDT feature report with clock frequency 2020-05-05 17:50:10 +08:00
Chun-Chieh Li d823756cb7 Nuvoton: Enlarge WDT reset delay to avoid premature WDT reset
Consider the following factors to define WDT reset delay:
1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading.
2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance.
2020-05-05 17:50:05 +08:00
Chun-Chieh Li 73824f0c4d Nuvoton: Fix watchdog reset failure on meeting Hard Fault
Original implementation doesn't enable watchdog reset in pieces of cascaded timeout, except the last one. This is to guarantee re-configuration can be in time, but in interrupt disabled scenario e.g. Hard Fault, watchdog reset can cease to be effective.

This change enables watchdog reset all the way of cascaded timeout. With trade-off, guaranteed watchdog reset function is more significant than re-configuration in time.
2020-04-30 14:22:30 +08:00
Chun-Chieh Li 2c9ec8f19d M487: Add SPDX license identifier for BSP files 2020-04-01 13:55:46 +08:00
Chun-Chieh Li d709c775b4 M487: Add SPDX license identifier 2020-04-01 13:55:45 +08:00
Chun-Chieh Li 3b9492fdbc M487: Update BSP
Relevant modifications:
1. Support degrading QSPI0/1 to SPI4/5 for normal SPI transfer
2. Fix with BSP crypto driver API change
3. Fix with BSP PDMA driver API change
4. Make necessary modifications to pass FPGA CI Test Shield tests
5. Don't distinguish pinmap among parts e.g. M480 LG. Application users must take care.
2020-04-01 13:55:12 +08:00
Chun-Chieh Li 5ec86411c4 M487: Re-organize PinNames.h
This is to support custom targets based on M480 series chips.
2020-03-12 09:34:45 +08:00
Chun-Chieh Li 2cf82821dd M487: Support configurability of USB/STDIO UART pins
-   STDIO_UART and STDIO_UART_TX/STDIO_UART_RX
-   USB_UART and USBTX/USBRX
2020-03-12 09:34:45 +08:00
Chun-Chieh Li 9d26390595 M487: Make memory specification configurable
This is to support custom targets based on M480 series chips.
2020-03-12 09:34:14 +08:00
Chun-Chieh Li 98c151a9f2 M487: Make SPIM CCM mode configurable
This is to support custom targets based on M480 series chips.
2020-03-12 09:31:51 +08:00
Chun-Chieh Li 2f770b77a9 M487: Remove BUTTON1/2 for custom targets
This is to support custom targets based on M480 series chips.
2020-03-12 09:31:51 +08:00
Chun-Chieh Li c4ffd38a90 M487: Change SERIAL_TX/SERIAL_RX pin names to other than USBTX/USBRX
USBTX/USBRX should be dedicated for USB VCOM and not for other uses.
2020-03-12 09:31:51 +08:00
Chun-Chieh Li cbf1a8a6fd M487: Get around h/w issue with reset from power-down mode
When UART interrupt enabled and WDT reset from power-down mode, in the next
cycle, UART interrupt keeps breaking in and cannot block unless via NVIC. To
get around it, we deliberately make up a signal of WDT wake-up from power-down
mode in the start of boot proces when WDT reset is detected.
2020-02-27 17:46:19 +08:00
Chun-Chieh Li 55f88a0942 M487: Re-implement Reset_Handler() in naked inline assembly
This is to guarantee SRAM bank2, not initialized yet, isn't used for stack by function preamble code at the very start.
2020-02-27 17:38:53 +08:00
Chun-Chieh Li 8df96ec50a Nuvoton: Make SPI inter-frame (delay match configured suspend interval
In no MISO case, skip SPI read so that no more write/read delay contribute to SPI inter-frame delay when data is written successively.

Update targets:
-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NU_PFM_M2351_*
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2020-02-17 15:00:09 +08:00
Chun-Chieh Li 4a1d612e90 Nuvoton: Fix delay code with RTC clock source
Explicitly configure RTC clock source to LXT

Update targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NUMAKER_M252KG
-   NUMAKER_IOT_M263A
2020-02-13 11:24:01 +08:00
Chun-Chieh Li 86fcae5b03 Nuvoton: Fix GPIO rising/falling edge interrupts cannot exist simultaneously
This is to pass mbed_hal_fpga_ci_test_shield-gpio_irq test.

Update targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NUMAKER_M252KG
-   NUMAKER_IOT_M263A
2020-02-13 11:24:01 +08:00
Przemyslaw Stekiel a4e1354769 Remove pinmap_restricted_peripherals() function from Nuvoton (STDIO uart is restricted by default) 2020-02-07 10:45:02 +01:00
Maciej Bocianski e3b8514a91 NUMAKER_IOT_M487: keep __vector_handlers symbols in LTO builds
Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )

This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
2020-02-04 12:38:37 +01:00
Filip Jagodzinski 28b1169b7e NUVOTON: Fix undefined reference to Reset_Handler_Cascade
Add a "used" attribute to Reset_Handler_Cascade to fix GCC build with
the "-flto" flag.
This attribute, attached to a function, means that code must be emitted
for the function even if it appears that the function is not referenced.
2020-02-04 12:29:51 +01:00
Chun-Chieh Li c99dc34f65 Nuvoton: Support dynamic heap configuration on IAR
On IAR, configure heap to 1KiB at a minimum and expandable, dependent on available SRAM. This requires IAR 8.x.

Support targets:
-   NUMAKER_PFM_NUC472 w/ and w/o XRAM
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2019-12-27 09:01:07 +08:00
Chun-Chieh Li aae04b2516 Nuvoton: Remove TRNG support
These targets below just support PRNG, not real TRNG. They cannot annouce TRNG.

-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M487
-   NUMAKER_IOT_M487

On targets without TRNG, to run mbedtls applications which require entropy source,
there are two alternatives to TRNG:

-   Custom entropy source:
    Define MBEDTLS_ENTROPY_HARDWARE_ALT and provide custom mbedtls_hardware_poll(...)
-   NV seed:
    1.  Define MBEDTLS_ENTROPY_NV_SEED
    2.  Define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO/MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and provide custom mbedtls_nv_seed_read(...)/mbedtls_nv_seed_write(...).
    3.  Don't define MBEDTLS_PSA_INJECT_ENTROPY. Meet mbedtls_psa_inject_entropy(...) undefined and then provide custom one, which must be compatible with mbedtls_nv_seed_read(...)/mbedtls_nv_seed_write(...) above.
    4.  For development, simulating partial provision process, inject entropy seed via mbedtls_psa_inject_entropy(...) pre-main.
2019-11-13 18:01:24 +08:00
Martin Kojtal 5a1ccc0f2f
Merge pull request #11780 from OpenNuvoton/nuvoton_fpga_perif_free
Nuvoton: Add implementations of HAL API i2c_free and analogin_free
2019-11-04 09:49:36 +01:00
Chun-Chieh Li 72ea613a12 Nuvoton: Add i2c_free
1.  Disable interrupt
2.  Disable IP clock
3.  Free up pins

Support targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NU_PFM_M2351*
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2019-10-31 15:22:57 +08:00
Chun-Chieh Li 3abd02614a Nuvoton: Add analogin_free
1.  Deal with channel-wise and module-wise
2.  Disable IP clock
3.  Free up pin

Support targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NU_PFM_M2351*
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2019-10-31 15:19:15 +08:00
int_szyk d68a802f07 Add watchdog clock accuracy to Nuvoton targets. 2019-09-30 08:10:25 +02:00
Chun-Chieh Li 96dac4faa7 [M487] Exclude A2/A3 from testing for NuMaker-IoT-M487 V1.3
Since NuMaker-IoT-M487 V1.3, A2/A3 are dedicated to on-board ESP8266 WiFi
module RTS/CTS pins and so must exclude from FPGA CI testing.
2019-08-20 13:12:44 +08:00
Chun-Chieh Li c3d7ef8341 [Nuvoton] Free up peripheral pins in peripheral free-up HAL API
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
2019-08-20 13:12:43 +08:00
Chun-Chieh Li ca0846b1e9 [Nuvoton] Support GPIO input pull-high/pull-low
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:

- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
2019-08-20 13:12:42 +08:00
Chun-Chieh Li 09bf844d76 [Nuvoton] Fix redundant call to UART IRQ handler
Honor RxIrq/TxIrq to avoid redundant call to UART IRQ handler.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-uart.
2019-08-20 13:12:42 +08:00
Chun-Chieh Li d46c6fea47 [Nuvoton] Fix redundant SPI clock generation
Fix SPI clocks are generated redundantly at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - async mode.
2019-08-20 13:12:42 +08:00
Chun-Chieh Li 80c21aeff5 [Nuvoton] Fix I2C NACK error
Fix logic error on replying NACK at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
2019-08-20 13:12:42 +08:00
Chun-Chieh Li fef138a3cd [Nuvoton] Fix IP initialization sequence
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)

NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
       IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
       IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
       situation.
2019-08-20 13:12:41 +08:00
Chun-Chieh Li 560fe33ed8 [Nuvoton] Exclude USB UART from testing
USB UART is dedicated to USB COM and so must exclude from FPGA CI testing.
2019-08-20 13:12:41 +08:00
Chun-Chieh Li f88bd72c19 [Nuvoton] Force enum PinName to 32-bit
NU_PINNAME_BIND(...) requires enum PinName to be 32-bit to encode module
binding information in it.
2019-08-20 13:12:41 +08:00