Relevant modifications:
1. Support degrading QSPI0/1 to SPI4/5 for normal SPI transfer
2. Fix with BSP crypto driver API change
3. Fix with BSP PDMA driver API change
4. Make necessary modifications to pass FPGA CI Test Shield tests
5. Don't distinguish pinmap among parts e.g. M480 LG. Application users must take care.
1. Modify PinMode enum to fully support GPIO I/O modes.
2. Translate input pull mode/direction to I/O mode, where H/W doesn't support
separate configuration for input pull mode/direction.
3. Allow for configuring I/O mode in addition to input pull mode.