From ff0b8fce30bb82db0ed5200f9848f44819b7cebd Mon Sep 17 00:00:00 2001 From: Mike Fiore Date: Mon, 24 Nov 2014 09:43:18 -0600 Subject: [PATCH] [cmsis][MTS_DRAGONFLY_F411RE] set USE_PLL_HSE_EXTC to 0, causing problems with IAR export and we have no external clock option --- .../TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c index 8f82661333..447ba61405 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c @@ -137,7 +137,7 @@ */ /* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */ -#define USE_PLL_HSE_EXTC (1) /* Use external clock */ +#define USE_PLL_HSE_EXTC (0) /* Use external clock */ #define USE_PLL_HSE_XTAL (1) /* Use external xtal */ /**