mirror of https://github.com/ARMmbed/mbed-os.git
Update linker script for using SRAM1 and SRAM2 in ARM
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:
1. Fixed size and small sections moved to SRAM2 (32K)
Vectors
Crash data
Remaining section - RW / ZI
2. Large memory space should be used for variable sections
RW/ZI
Heap - (Minimum - 0x12000)
Stack - At bottom
pull/10018/head
Deepika
parent
6dbc00dd8a
commit
feba293673
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@ -29,36 +29,82 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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#if !defined(MBED_APP_START)
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x08000000
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#define MBED_APP_START 0x08000000
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#endif
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#endif
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; 256KB FLASH (0x40000)
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#if !defined(MBED_APP_SIZE)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x40000
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#define MBED_APP_SIZE 0x40000
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#endif
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; 48KB SRAM (0xC000) + 16KB SRAM (0x4000)
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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; RW data 48k L4-SRAM1
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0xC000
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#endif
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#if !defined(MBED_RAM2_START)
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#define MBED_RAM2_START 0x10000000
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#endif
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; RW data 16k L4-ECC-SRAM2 retained in standby
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#if !defined(MBED_RAM2_SIZE)
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#define MBED_RAM2_SIZE 0x4000
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#endif
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#endif
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#define Stack_Size MBED_BOOT_STACK_SIZE
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; Total: 99 vectors = 396 bytes (0x18C+0x4) to be reserved in RAM
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#if !defined(VECTOR_SIZE)
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#define VECTOR_SIZE 0x190
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#endif
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; 256KB FLASH (0x40000) + 48KB SRAM (0xC000) + 16KB SRAM (0x4000)
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; Crash report not enabled as default
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_CRASH_REPORT_RAM_SIZE 0x0
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#endif
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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;Vectors + Crash report - Fixed at start of RAM2 in sequence
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#define MBED_IRAM2_SIZE (MBED_RAM2_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_CRASH_REPORT_RAM_START (MBED_RAM2_START + VECTOR_SIZE)
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#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
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; Minimum heap should be larger then smallest RAM bank (else can use
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; that bank for heap) and less then largest RAM bank.
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#define MINIMUM_HEAP 0x4000
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#define RAM_FIXED_SIZE 0x0
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;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x8000 available)
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;and IRAM2 (MBED_IRAM2_SIZE = 0x3E70 available)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*.o (RESET, +First)
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*(InRoot$$Sections)
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*(InRoot$$Sections)
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.ANY (+RO)
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.ANY (+RO)
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}
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}
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RW_IRAM1 0x20000000 0x0000C000-Stack_Size { ; RW data 48k L4-SRAM1
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RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
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.ANY (+RW +ZI)
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}
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}
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; Total: 99 vectors = 396 bytes (0x18C+0x4) to be reserved in RAM
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RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE-MINIMUM_HEAP) { ; RW data
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RW_IRAM2 (0x10000000+0x190) (0x04000-0x190) { ; RW data 16k L4-ECC-SRAM2 retained in standby
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.ANY (+RW +ZI)
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.ANY (+RW +ZI)
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}
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}
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ARM_LIB_STACK (0x20000000+0x0000C000) EMPTY -Stack_Size { ; stack
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
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.ANY (+RW +ZI)
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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}
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}
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@ -29,44 +29,82 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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#if !defined(MBED_APP_START)
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x08000000
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#define MBED_APP_START 0x08000000
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#endif
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#endif
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; 1MB FLASH (0x100000)
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#if !defined(MBED_APP_SIZE)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x100000
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#define MBED_APP_SIZE 0x100000
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#endif
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#endif
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#define MBED_RAM_START 0x20000000
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; 128KB SRAM (0x20000)
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#define MBED_RAM_SIZE 0x00018000
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#if !defined(MBED_RAM_START)
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#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#define MBED_CRASH_REPORT_RAM_SIZE 0x100
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#endif
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#define MBED_RAM0_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
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; RW data 96k L4-SRAM1
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x18000
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#endif
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#if !defined(MBED_RAM2_START)
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#define MBED_RAM2_START 0x10000000
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#endif
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; RW data 32k L4-ECC-SRAM2
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#if !defined(MBED_RAM2_SIZE)
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#define MBED_RAM2_SIZE 0x8000
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#endif
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#define Stack_Size MBED_BOOT_STACK_SIZE
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; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
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#if !defined(VECTOR_SIZE)
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#define VECTOR_SIZE 0x188
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#endif
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; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
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; Crash report enabled as default
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_CRASH_REPORT_RAM_SIZE 0x100
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#endif
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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;Vectors + Crash report - Fixed at start of RAM2 in sequence
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#define MBED_IRAM2_SIZE (MBED_RAM2_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
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#define MBED_CRASH_REPORT_RAM_START (MBED_RAM2_START + VECTOR_SIZE)
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#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
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; Minimum heap should be larger then smallest RAM bank (else can use
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; that bank for heap) and less then largest RAM bank.
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#define MINIMUM_HEAP 0x12000
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#define RAM_FIXED_SIZE MBED_BOOT_STACK_SIZE
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;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x6000 available)
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;and IRAM2 (MBED_IRAM2_SIZE = 0x7D78 available)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*.o (RESET, +First)
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*(InRoot$$Sections)
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*(InRoot$$Sections)
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.ANY (+RO)
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.ANY (+RO)
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}
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}
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RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
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RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
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}
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}
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RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1
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.ANY (+RW, +Last)
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RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE-MINIMUM_HEAP) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
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RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; ZI data 32k L4-ECC-SRAM2
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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.ANY (+ZI)
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}
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}
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ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
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RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
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.ANY (+RW +ZI)
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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}
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}
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@ -139,4 +139,13 @@
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#define MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE 3072
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#define MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE 3072
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#endif
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#endif
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#if (defined(TARGET_STM32L475VG) || defined(TARGET_STM32L443RC))
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#if defined(__ARMCC_VERSION)
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[];
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#define HEAP_START Image$$ARM_LIB_HEAP$$ZI$$Base
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#define HEAP_SIZE Image$$ARM_LIB_HEAP$$ZI$$Length
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#endif
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#endif
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#endif // MBED_MBED_RTX_H
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#endif // MBED_MBED_RTX_H
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