diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/mbed_crc_api.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/mbed_crc_api.c new file mode 100644 index 0000000000..fa81e44bda --- /dev/null +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/mbed_crc_api.c @@ -0,0 +1,125 @@ +#include "crc_api.h" + +#include "drivers/fsl_crc.h" +#include "platform/mbed_assert.h" + +#ifdef DEVICE_CRC + +static crc_bits_t width; + +bool hal_crc_is_supported(const uint32_t polynomial) +{ + switch (polynomial) + { + case POLY_8BIT_CCITT: + case POLY_7BIT_SD: + case POLY_16BIT_CCITT: + case POLY_16BIT_IBM: + case POLY_32BIT_ANSI: + return true; + default: + return false; + } +} + +void hal_crc_compute_partial_start(const uint32_t polynomial) +{ + crc_config_t config; + + switch (polynomial) + { + case POLY_32BIT_ANSI: + { + width = kCrcBits32; + + config.polynomial = polynomial; + config.seed = 0xFFFFFFFFU; + config.reflectIn = true; + config.reflectOut = true; + config.complementChecksum = true; + config.crcBits = width; + config.crcResult = kCrcFinalChecksum; + + break; + } + case POLY_16BIT_IBM: + { + width = kCrcBits16; + + config.polynomial = polynomial; + config.seed = 0; + config.reflectIn = true; + config.reflectOut = true; + config.complementChecksum = false; + config.crcBits = width; + config.crcResult = kCrcFinalChecksum; + + break; + } + case POLY_16BIT_CCITT: + { + width = kCrcBits16; + + config.polynomial = polynomial; + config.seed = 0xFFFFFFFFU; + config.reflectIn = false; + config.reflectOut = false; + config.complementChecksum = false; + config.crcBits = width; + config.crcResult = kCrcFinalChecksum; + + break; + } + case POLY_8BIT_CCITT: + { + width = kCrcBits16; + + config.polynomial = polynomial; + config.seed = 0U; + config.reflectIn = false; + config.reflectOut = false; + config.complementChecksum = false; + config.crcBits = width; + config.crcResult = kCrcFinalChecksum; + + break; + } + case POLY_7BIT_SD: + { + width = kCrcBits16; + + config.polynomial = polynomial; + config.seed = 0U; + config.reflectIn = false; + config.reflectOut = false; + config.complementChecksum = false; + config.crcBits = width; + config.crcResult = kCrcFinalChecksum; + + break; + } + } + + CRC_Init(CRC0, &config); +} + +void hal_crc_compute_partial(const uint8_t *data, const size_t size) +{ + CRC_WriteData(CRC0, data, size); +} + +uint32_t hal_crc_get_result(void) +{ + switch (width) + { + case kCrcBits16: + return CRC_Get16bitResult(CRC0); + case kCrcBits32: + return CRC_Get32bitResult(CRC0); + default: + MBED_ASSERT("Unhandled switch case"); + return 0; + } +} + +#endif // DEVICE_CRC diff --git a/targets/targets.json b/targets/targets.json index de70cedbed..cbee2bacfb 100755 --- a/targets/targets.json +++ b/targets/targets.json @@ -631,7 +631,7 @@ "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"], "inherits": ["Target"], "detect_code": ["0240"], - "device_has": ["ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CRC", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"], "features": ["LWIP", "STORAGE"], "release_versions": ["2", "5"], "device_name": "MK64FN1M0xxx12",