mirror of https://github.com/ARMmbed/mbed-os.git
[NUCLEO_L053R8] Add cmsis files (5)
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/**
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******************************************************************************
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* @file stm32l0xx_hal_uart.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 22-April-2014
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* @brief Header file of UART HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L0xx_HAL_UART_H
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#define __STM32L0xx_HAL_UART_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l0xx_hal_def.h"
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup UART
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief UART Init Structure definition
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*/
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typedef struct
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{
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uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
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The baud rate register is computed using the following formula:
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- If oversampling is 16 or in LIN mode,
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Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
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- If oversampling is 8,
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Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
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Baud Rate Register[3] = 0
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Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
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uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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This parameter can be a value of @ref UART_Word_Length */
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uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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This parameter can be a value of @ref UART_Stop_Bits */
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uint32_t Parity; /*!< Specifies the parity mode.
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This parameter can be a value of @ref UART_Parity
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@note When parity is enabled, the computed parity is inserted
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at the MSB position of the transmitted data (9th bit when
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the word length is set to 9 data bits; 8th bit when the
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word length is set to 8 data bits). */
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uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
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This parameter can be a value of @ref UART_Mode */
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uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
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or disabled.
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This parameter can be a value of @ref UART_Hardware_Flow_Control */
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uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
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This parameter can be a value of @ref UART_Over_Sampling */
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uint32_t OneBitSampling; /*!< Specifies wether a single sample or three samples' majority vote is selected.
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Selecting the single sample method increases the receiver tolerance to clock
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deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
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}UART_InitTypeDef;
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/**
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* @brief UART Advanced Features initalization structure definition
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*/
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typedef struct
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{
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uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
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Advanced Features may be initialized at the same time .
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This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
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uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
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This parameter can be a value of @ref UART_Tx_Inv */
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uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
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This parameter can be a value of @ref UART_Rx_Inv */
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uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
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vs negative/inverted logic).
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This parameter can be a value of @ref UART_Data_Inv */
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uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
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This parameter can be a value of @ref UART_Rx_Tx_Swap */
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uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
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This parameter can be a value of @ref UART_Overrun_Disable */
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uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
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This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
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uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
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This parameter can be a value of @ref UART_AutoBaudRate_Enable */
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uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
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detection is carried out.
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This parameter can be a value of @ref UART_AutoBaud_Rate_Mode */
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uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
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This parameter can be a value of @ref UART_MSB_First */
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} UART_AdvFeatureInitTypeDef;
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/**
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* @brief HAL UART State structures definition
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*/
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typedef enum
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{
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HAL_UART_STATE_RESET = 0x00, /*!< Peripheral Reset state */
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HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
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HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
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HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
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HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
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HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
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HAL_UART_STATE_ERROR = 0x04 /*!< Error */
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}HAL_UART_StateTypeDef;
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/**
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* @brief HAL UART Error Code structure definition
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*/
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typedef enum
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{
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HAL_UART_ERROR_NONE = 0x00, /*!< No error */
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HAL_UART_ERROR_PE = 0x01, /*!< Parity error */
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HAL_UART_ERROR_NE = 0x02, /*!< Noise error */
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HAL_UART_ERROR_FE = 0x04, /*!< frame error */
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HAL_UART_ERROR_ORE = 0x08, /*!< Overrun error */
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HAL_UART_ERROR_DMA = 0x10 /*!< DMA transfer error */
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}HAL_UART_ErrorTypeDef;
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/**
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* @brief UART clock sources definition
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*/
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typedef enum
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{
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UART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
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UART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
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UART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
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UART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
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UART_CLOCKSOURCE_LSE = 0x08 /*!< LSE clock source */
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}UART_ClockSourceTypeDef;
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/**
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* @brief UART handle Structure definition
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*/
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typedef struct
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{
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USART_TypeDef *Instance; /* UART registers base address */
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UART_InitTypeDef Init; /* UART communication parameters */
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UART_AdvFeatureInitTypeDef AdvancedInit; /* UART Advanced Features initialization parameters */
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uint8_t *pTxBuffPtr; /* Pointer to UART Tx transfer Buffer */
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uint16_t TxXferSize; /* UART Tx Transfer size */
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uint16_t TxXferCount; /* UART Tx Transfer Counter */
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uint8_t *pRxBuffPtr; /* Pointer to UART Rx transfer Buffer */
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uint16_t RxXferSize; /* UART Rx Transfer size */
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uint16_t RxXferCount; /* UART Rx Transfer Counter */
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uint16_t Mask; /* UART Rx RDR register mask */
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DMA_HandleTypeDef *hdmatx; /* UART Tx DMA Handle parameters */
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DMA_HandleTypeDef *hdmarx; /* UART Rx DMA Handle parameters */
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HAL_LockTypeDef Lock; /* Locking object */
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__IO HAL_UART_StateTypeDef State; /* UART communication state */
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__IO HAL_UART_ErrorTypeDef ErrorCode; /* UART Error code */
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}UART_HandleTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup UART_Exported_Constants
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* @{
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*/
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/** @defgroup UART_Stop_Bits UART Number of Stop Bits
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* @{
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*/
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#define UART_STOPBITS_1 ((uint32_t)0x0000)
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#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
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#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
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((STOPBITS) == UART_STOPBITS_2))
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/**
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* @}
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*/
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/** @defgroup UART_Parity UART Parity
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* @{
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*/
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#define UART_PARITY_NONE ((uint32_t)0x0000)
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#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
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#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
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#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
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((PARITY) == UART_PARITY_EVEN) || \
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((PARITY) == UART_PARITY_ODD))
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/**
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* @}
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*/
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/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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* @{
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*/
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#define UART_HWCONTROL_NONE ((uint32_t)0x0000)
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#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
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#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
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#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
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#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
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(((CONTROL) == UART_HWCONTROL_NONE) || \
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((CONTROL) == UART_HWCONTROL_RTS) || \
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((CONTROL) == UART_HWCONTROL_CTS) || \
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((CONTROL) == UART_HWCONTROL_RTS_CTS))
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/**
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* @}
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*/
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/** @defgroup UART_Mode UART Transfer Mode
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* @{
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*/
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#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
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#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
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#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
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#define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
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/**
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* @}
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*/
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/** @defgroup UART_State UART State
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* @{
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*/
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#define UART_STATE_DISABLE ((uint32_t)0x0000)
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#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
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#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
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((STATE) == UART_STATE_ENABLE))
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/**
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* @}
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*/
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/** @defgroup UART_Over_Sampling UART Over Sampling
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* @{
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*/
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#define UART_OVERSAMPLING_16 ((uint32_t)0x0000)
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#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
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#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
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((SAMPLING) == UART_OVERSAMPLING_8))
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/**
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* @}
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*/
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/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
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* @{
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*/
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#define UART_ONEBIT_SAMPLING_DISABLED ((uint32_t)0x0000)
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#define UART_ONEBIT_SAMPLING_ENABLED ((uint32_t)USART_CR3_ONEBIT)
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#define IS_UART_ONEBIT_SAMPLING(ONEBIT) (((ONEBIT) == UART_ONEBIT_SAMPLING_DISABLED) || \
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((ONEBIT) == UART_ONEBIT_SAMPLING_ENABLED))
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/**
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* @}
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*/
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/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
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* @{
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*/
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#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000)
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#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
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#define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) || \
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((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
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/**
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* @}
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*/
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/** @defgroup UART_LIN UART Local Interconnection Network mode
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* @{
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*/
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#define UART_LIN_DISABLE ((uint32_t)0x00000000)
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#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
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#define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) || \
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((LIN) == UART_LIN_ENABLE))
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/**
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* @}
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*/
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/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
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* @{
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*/
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#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
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#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
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#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
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((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
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/**
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* @}
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*/
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/** @defgroup UART_One_Bit UART One Bit sampling
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* @{
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*/
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#define UART_ONE_BIT_SAMPLE_DISABLED ((uint32_t)0x00000000)
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#define UART_ONE_BIT_SAMPLE_ENABLED ((uint32_t)USART_CR3_ONEBIT)
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#define IS_UART_ONEBIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLED) || \
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((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLED))
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/**
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* @}
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*/
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/** @defgroup UART_DMA_Tx UART DMA Tx
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* @{
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*/
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#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000)
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#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
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#define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) || \
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((DMATX) == UART_DMA_TX_ENABLE))
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/**
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* @}
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*/
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/** @defgroup UART_DMA_Rx UART DMA Rx
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* @{
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*/
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#define UART_DMA_RX_DISABLE ((uint32_t)0x0000)
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#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
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#define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) || \
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((DMARX) == UART_DMA_RX_ENABLE))
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/**
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* @}
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*/
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/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
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* @{
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*/
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#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000)
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#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
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#define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) || \
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((HDSEL) == UART_HALF_DUPLEX_ENABLE))
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/**
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* @}
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*/
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/** @defgroup UART_Flags UART Status Flags
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* Elements values convention: 0xXXXX
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* - 0xXXXX : Flag mask in the ISR register
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* @{
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*/
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#define UART_FLAG_REACK ((uint32_t)0x00400000)
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#define UART_FLAG_TEACK ((uint32_t)0x00200000)
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#define UART_FLAG_WUF ((uint32_t)0x00100000)
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#define UART_FLAG_RWU ((uint32_t)0x00080000)
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#define UART_FLAG_SBKF ((uint32_t)0x00040000
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#define UART_FLAG_CMF ((uint32_t)0x00020000)
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#define UART_FLAG_BUSY ((uint32_t)0x00010000)
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#define UART_FLAG_ABRF ((uint32_t)0x00008000)
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#define UART_FLAG_ABRE ((uint32_t)0x00004000)
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#define UART_FLAG_EOBF ((uint32_t)0x00001000)
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#define UART_FLAG_RTOF ((uint32_t)0x00000800)
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#define UART_FLAG_CTS ((uint32_t)0x00000400)
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#define UART_FLAG_CTSIF ((uint32_t)0x00000200)
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#define UART_FLAG_LBDF ((uint32_t)0x00000100)
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#define UART_FLAG_TXE ((uint32_t)0x00000080)
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#define UART_FLAG_TC ((uint32_t)0x00000040)
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#define UART_FLAG_RXNE ((uint32_t)0x00000020)
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#define UART_FLAG_IDLE ((uint32_t)0x00000010)
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#define UART_FLAG_ORE ((uint32_t)0x00000008)
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#define UART_FLAG_NE ((uint32_t)0x00000004)
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#define UART_FLAG_FE ((uint32_t)0x00000002)
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#define UART_FLAG_PE ((uint32_t)0x00000001)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Interrupt_definition UART Interrupts Definition
|
||||
* Elements values convention: 0000ZZZZ0XXYYYYYb
|
||||
* - YYYYY : Interrupt source position in the XX register (5bits)
|
||||
* - XX : Interrupt source register (2bits)
|
||||
* - 01: CR1 register
|
||||
* - 10: CR2 register
|
||||
* - 11: CR3 register
|
||||
* - ZZZZ : Flag position in the ISR register(4bits)
|
||||
* @{
|
||||
*/
|
||||
#define UART_IT_PE ((uint32_t)0x0028)
|
||||
#define UART_IT_TXE ((uint32_t)0x0727)
|
||||
#define UART_IT_TC ((uint32_t)0x0626)
|
||||
#define UART_IT_RXNE ((uint32_t)0x0525)
|
||||
#define UART_IT_IDLE ((uint32_t)0x0424)
|
||||
#define UART_IT_LBD ((uint32_t)0x0846)
|
||||
#define UART_IT_CTS ((uint32_t)0x096A)
|
||||
#define UART_IT_CM ((uint32_t)0x142E)
|
||||
#define UART_IT_WUF ((uint32_t)0x1476)
|
||||
|
||||
/** Elements values convention: 000000000XXYYYYYb
|
||||
* - YYYYY : Interrupt source position in the XX register (5bits)
|
||||
* - XX : Interrupt source register (2bits)
|
||||
* - 01: CR1 register
|
||||
* - 10: CR2 register
|
||||
* - 11: CR3 register
|
||||
*/
|
||||
#define UART_IT_ERR ((uint32_t)0x0060)
|
||||
|
||||
/** Elements values convention: 0000ZZZZ00000000b
|
||||
* - ZZZZ : Flag position in the ISR register(4bits)
|
||||
*/
|
||||
#define UART_IT_ORE ((uint32_t)0x0300)
|
||||
#define UART_IT_NE ((uint32_t)0x0200)
|
||||
#define UART_IT_FE ((uint32_t)0x0100)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
|
||||
* @{
|
||||
*/
|
||||
#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
|
||||
#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
|
||||
#define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
|
||||
#define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
|
||||
#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
|
||||
#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
|
||||
#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
|
||||
#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
|
||||
#define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
|
||||
#define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
|
||||
#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
|
||||
#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Request_Parameters UART Request Parameters
|
||||
* @{
|
||||
*/
|
||||
#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
|
||||
#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
|
||||
#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
|
||||
#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
|
||||
#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
|
||||
#define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \
|
||||
((PARAM) == UART_SENDBREAK_REQUEST) || \
|
||||
((PARAM) == UART_MUTE_MODE_REQUEST) || \
|
||||
((PARAM) == UART_RXDATA_FLUSH_REQUEST) || \
|
||||
((PARAM) == UART_TXDATA_FLUSH_REQUEST))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001)
|
||||
#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002)
|
||||
#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004)
|
||||
#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008)
|
||||
#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010)
|
||||
#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020)
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040)
|
||||
#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080)
|
||||
#define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT | \
|
||||
UART_ADVFEATURE_TXINVERT_INIT | \
|
||||
UART_ADVFEATURE_RXINVERT_INIT | \
|
||||
UART_ADVFEATURE_DATAINVERT_INIT | \
|
||||
UART_ADVFEATURE_SWAP_INIT | \
|
||||
UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
|
||||
UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
|
||||
UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
|
||||
UART_ADVFEATURE_MSBFIRST_INIT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
|
||||
#define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) || \
|
||||
((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
|
||||
#define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) || \
|
||||
((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
|
||||
#define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) || \
|
||||
((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
|
||||
#define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) || \
|
||||
((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
|
||||
#define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
|
||||
((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
|
||||
#define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
|
||||
((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
|
||||
#define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
|
||||
((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_MSB_First UART Advanced Feature MSB First
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
|
||||
#define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
|
||||
((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM)
|
||||
#define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
|
||||
((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000)
|
||||
#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
|
||||
#define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
|
||||
((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
|
||||
* @{
|
||||
*/
|
||||
#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
|
||||
* @{
|
||||
*/
|
||||
#define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000)
|
||||
#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1)
|
||||
#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS)
|
||||
#define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) || \
|
||||
((WAKE) == UART_WAKEUP_ON_STARTBIT) || \
|
||||
((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
|
||||
* @{
|
||||
*/
|
||||
#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000)
|
||||
#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
|
||||
#define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) || \
|
||||
((POLARITY) == UART_DE_POLARITY_LOW))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
|
||||
* @{
|
||||
*/
|
||||
#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
|
||||
* @{
|
||||
*/
|
||||
#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
|
||||
* @{
|
||||
*/
|
||||
#define UART_IT_MASK ((uint32_t)0x001F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset UART handle state
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* The Handle Instance which can be USART1, USART2 or LPUART.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
|
||||
|
||||
/** @brief Checks whether the specified UART flag is set or not.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_FLAG_REACK: Receive enable ackowledge flag
|
||||
* @arg UART_FLAG_TEACK: Transmit enable ackowledge flag
|
||||
* @arg UART_FLAG_WUF: Wake up from stop mode flag
|
||||
* @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
|
||||
* @arg UART_FLAG_SBKF: Send Break flag
|
||||
* @arg UART_FLAG_CMF: Character match flag
|
||||
* @arg UART_FLAG_BUSY: Busy flag
|
||||
* @arg UART_FLAG_ABRF: Auto Baud rate detection flag
|
||||
* @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
|
||||
* @arg UART_FLAG_EOBF: End of block flag
|
||||
* @arg UART_FLAG_RTOF: Receiver timeout flag
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag
|
||||
* @arg UART_FLAG_TXE: Transmit data register empty flag
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag
|
||||
* @arg UART_FLAG_IDLE: Idle Line detection flag
|
||||
* @arg UART_FLAG_ORE: OverRun Error flag
|
||||
* @arg UART_FLAG_NE: Noise Error flag
|
||||
* @arg UART_FLAG_FE: Framing Error flag
|
||||
* @arg UART_FLAG_PE: Parity Error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Enables the specified UART interrupt.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __INTERRUPT__: specifies the UART interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_WUF: Wakeup from stop mode interrupt
|
||||
* @arg UART_IT_CM: Character match interrupt
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 |= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
|
||||
((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 |= (1 << ((__INTERRUPT__) & UART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1 << ((__INTERRUPT__) & UART_IT_MASK))))
|
||||
|
||||
/** @brief Disables the specified UART interrupt.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __INTERRUPT__: specifies the UART interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_WUF: Wakeup from stop mode interrupt
|
||||
* @arg UART_IT_CM: Character match interrupt
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
|
||||
((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & UART_IT_MASK))))
|
||||
|
||||
/** @brief Checks whether the specified UART interrupt has occurred or not.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __IT__: specifies the UART interrupt to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_WUF: Wakeup from stop mode interrupt
|
||||
* @arg UART_IT_CM: Character match interrupt
|
||||
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_ORE: OverRun Error interrupt
|
||||
* @arg UART_IT_NE: Noise Error interrupt
|
||||
* @arg UART_IT_FE: Framing Error interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
|
||||
|
||||
/** @brief Checks whether the specified UART interrupt source is enabled.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __IT__: specifies the UART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_ORE: OverRun Error interrupt
|
||||
* @arg UART_IT_NE: Noise Error interrupt
|
||||
* @arg UART_IT_FE: Framing Error interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
|
||||
* to clear the corresponding interrupt
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_CLEAR_PEF: Parity Error Clear Flag
|
||||
* @arg UART_CLEAR_FEF: Framing Error Clear Flag
|
||||
* @arg UART_CLEAR_NEF: Noise detected Clear Flag
|
||||
* @arg UART_CLEAR_OREF: OverRun Error Clear Flag
|
||||
* @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
|
||||
* @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
|
||||
* @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
|
||||
* @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
|
||||
* @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
|
||||
* @arg UART_CLEAR_EOBF: End Of Block Clear Flag
|
||||
* @arg UART_CLEAR_CMF: Character Match Clear Flag
|
||||
* @arg UART_CLEAR_WUF: Wake Up from stop mode Clear Flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR |= (uint32_t)(__IT_CLEAR__))
|
||||
|
||||
/** @brief Set a specific UART request flag.
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* This parameter can be USART1, USART2 or LPUART.
|
||||
* @param __REQ__: specifies the request flag to set
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
|
||||
* @arg UART_SENDBREAK_REQUEST: Send Break Request
|
||||
* @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
|
||||
* @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
|
||||
* @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
|
||||
|
||||
/** @brief Enable UART
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* The Handle Instance can be USART1, USART2 or LPUART.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
|
||||
/** @brief Disable UART
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* The Handle Instance can be USART1, USART2 or LPUART.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
|
||||
/** @brief BRR division operation to set BRR register with LPUART
|
||||
* @param _PCLK_: LPUART clock
|
||||
* @param _BAUD_: Baud rate set by the user
|
||||
* @retval Division result
|
||||
*/
|
||||
#define __DIV_LPUART(_PCLK_, _BAUD_) (((_PCLK_)*256)/((_BAUD_)))
|
||||
|
||||
/** @brief BRR division operation to set BRR register in 8-bit oversampling mode
|
||||
* @param _PCLK_: UART clock
|
||||
* @param _BAUD_: Baud rate set by the user
|
||||
* @retval Division result
|
||||
*/
|
||||
#define __DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_)))
|
||||
|
||||
/** @brief BRR division operation to set BRR register in 16-bit oversampling mode
|
||||
* @param _PCLK_: UART clock
|
||||
* @param _BAUD_: Baud rate set by the user
|
||||
* @retval Division result
|
||||
*/
|
||||
#define __DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_)))
|
||||
|
||||
/** @brief Check UART Baud rate
|
||||
* @param BAUDRATE: Baudrate specified by the user
|
||||
* The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
|
||||
* divided by the smallest oversampling used on the USART (i.e. 8)
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4000001)
|
||||
|
||||
/** @brief Check UART byte address
|
||||
* @param ADDRESS: UART 8-bit address for wake-up process scheme
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F)
|
||||
|
||||
/** @brief Check UART 4-bit address
|
||||
* @param ADDRESS: UART 4-bit address for wake-up process scheme
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
||||
|
||||
/** @brief Check UART assertion time
|
||||
* @param TIME: 5-bit value assertion time
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
|
||||
|
||||
/** @brief Check UART deassertion time
|
||||
* @param TIME: 5-bit value deassertion time
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Include UART HAL Extension module */
|
||||
#include "stm32l0xx_hal_uart_ex.h"
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
|
||||
HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_WakeupCallback(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Peripheral Control and State functions ************************************/
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
|
||||
void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
|
||||
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Non-User functions ********************************************************/
|
||||
void UART_SetConfig(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
|
||||
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_UART_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,428 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_uart_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Extended UART HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Inter Integrated Circuit (UART) peripheral:
|
||||
* + Extended Control methods
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### UART peripheral extended features #####
|
||||
==============================================================================
|
||||
|
||||
[..] Comparing to other previous devices, the UART interface for STM32L0XX
|
||||
devices contains the following additional features
|
||||
|
||||
(+) Possibility to disable or enable Analog Noise Filter
|
||||
(+) Use of a configured Digital Noise Filter
|
||||
(+) Disable or enable wakeup from Stop mode
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..] This driver provides functions to configure Noise Filter
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEx
|
||||
* @brief UARTEx module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
#define UART_REACK_TIMEOUT ((uint32_t) 1000)
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
static void UART_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup UARTEX_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEx_Group1 Extended Initialization/de-initialization functions
|
||||
* @brief Extended Initialization and Configuration Functions
|
||||
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization and Configuration functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
The HAL_RS485Ex_Init() API follows respectively the UART RS485 mode
|
||||
configuration procedures (details for the procedures are available in reference manual).
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the RS485 Driver enable feature according to the specified
|
||||
* parameters in the UART_InitTypeDef and creates the associated handle .
|
||||
* @param huart: uart handle
|
||||
* @param Polarity: select the driver enable polarity
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_DE_POLARITY_HIGH: DE signal is active high
|
||||
* @arg UART_DE_POLARITY_LOW: DE signal is active low
|
||||
* @param AssertionTime: Driver Enable assertion time
|
||||
* 5-bit value defining the time between the activation of the DE (Driver Enable)
|
||||
* signal and the beginning of the start bit. It is expressed in sample time
|
||||
* units (1/8 or 1/16 bit time, depending on the oversampling rate)
|
||||
* @param DeassertionTime: Driver Enable deassertion time
|
||||
* 5-bit value defining the time between the end of the last stop bit, in a
|
||||
* transmitted message, and the de-activation of the DE (Driver Enable) signal.
|
||||
* It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
|
||||
* oversampling rate).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime)
|
||||
{
|
||||
uint32_t temp = 0x0;
|
||||
|
||||
/* Check the UART handle allocation */
|
||||
if(huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the Driver Enable polarity */
|
||||
assert_param(IS_UART_DE_POLARITY(Polarity));
|
||||
|
||||
/* Check the Driver Enable assertion time */
|
||||
assert_param(IS_UART_ASSERTIONTIME(AssertionTime));
|
||||
|
||||
/* Check the Driver Enable deassertion time */
|
||||
assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime));
|
||||
|
||||
if(huart->State == HAL_UART_STATE_RESET)
|
||||
{
|
||||
/* Init the low level hardware : GPIO, CLOCK, CORTEX */
|
||||
HAL_UART_MspInit(huart);
|
||||
}
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the UART Communication parameters */
|
||||
UART_SetConfig(huart);
|
||||
|
||||
if(huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
|
||||
{
|
||||
UART_AdvFeatureConfig(huart);
|
||||
}
|
||||
|
||||
/* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */
|
||||
huart->Instance->CR3 |= USART_CR3_DEM;
|
||||
|
||||
/* Set the Driver Enable polarity */
|
||||
MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity);
|
||||
|
||||
/* Set the Driver Enable assertion and deassertion times */
|
||||
temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS);
|
||||
temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS);
|
||||
MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp);
|
||||
|
||||
/* Enable the Peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* TEACK and/or REACK to check before moving huart->State to Ready */
|
||||
return (UART_CheckIdleState(huart));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEX_Group1 Peripheral Control methods
|
||||
* @brief management functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Peripheral Control methods #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
|
||||
(+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address
|
||||
detection length to more than 4 bits for multiprocessor address mark wake up.
|
||||
(+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode
|
||||
(+) HAL_UARTEx_DisableStopMode() API disables the above functionality
|
||||
(+) HAL_UARTEx_EnableClockStopMode() API enables the UART HSI clock during stop mode
|
||||
(+) HAL_UARTEx_DisableClockStopMode() API disables the above functionality
|
||||
(+) UART_Wakeup_AddressConfig() API configures the wake-up from stop mode parameters
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable UART Stop Mode
|
||||
* The UART is able to wake up the MCU from Stop mode as long as UART clock is HSI or LSE
|
||||
* @param huart: uart handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Set the USART UESM bit */
|
||||
huart->Instance->CR1 |= USART_CR1_UESM;
|
||||
|
||||
huart->State = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable UART Clock in Stop Mode
|
||||
* The UART keeps the Clock ON during Stop mode
|
||||
* @param huart: uart handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Set the USART UESM bit */
|
||||
huart->Instance->CR3 |= USART_CR3_UCESM;
|
||||
|
||||
huart->State = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable UART Stop Mode
|
||||
* @param huart: uart handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Clear USART UESM bit */
|
||||
huart->Instance->CR1 &= ~(USART_CR1_UESM);
|
||||
|
||||
huart->State = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable UART Clock in Stop Mode
|
||||
* @param huart: uart handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Clear USART UESM bit */
|
||||
huart->Instance->CR3 &= ~(USART_CR3_UCESM);
|
||||
|
||||
huart->State = HAL_UART_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set Wakeup from Stop mode interrupt flag selection
|
||||
* @param huart: uart handle,
|
||||
* @param WakeUpSelection: address match, Start Bit detection or RXNE bit status.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_WAKEUP_ON_ADDRESS
|
||||
* @arg UART_WAKEUP_ON_STARTBIT
|
||||
* @arg UART_WAKEUP_ON_READDATA_NONEMPTY
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
|
||||
{
|
||||
/* Check the wake-up selection parameter */
|
||||
assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent));
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(huart);
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the wake-up selection scheme */
|
||||
MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent);
|
||||
|
||||
if(WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS)
|
||||
{
|
||||
UART_Wakeup_AddressConfig(huart, WakeUpSelection);
|
||||
}
|
||||
|
||||
/* Enable the Peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* Wait until REACK flag is set before moving huart->State to Ready */
|
||||
if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, UART_REACK_TIMEOUT) != HAL_OK)
|
||||
{
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(huart);
|
||||
|
||||
/* Initialize the UART state*/
|
||||
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
||||
huart->State= HAL_UART_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
/**
|
||||
* @brief By default in multiprocessor mode, when the wake up method is set
|
||||
* to address mark, the UART handles only 4-bit long addresses detection.
|
||||
* This API allows to enable longer addresses detection (6-, 7- or 8-bit
|
||||
* long):
|
||||
* - 6-bit address detection in 7-bit data mode
|
||||
* - 7-bit address detection in 8-bit data mode
|
||||
* - 8-bit address detection in 9-bit data mode
|
||||
* @param huart: UART handle
|
||||
* @param AddressLength: this parameter can be one of the following values:
|
||||
* @arg UART_ADDRESS_DETECT_4B: 4-bit long address
|
||||
* @arg UART_ADDRESS_DETECT_7B: 6-, 7- or 8-bit long address
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength)
|
||||
{
|
||||
/* Check the UART handle allocation */
|
||||
if(huart == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the address length parameter */
|
||||
assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength));
|
||||
|
||||
huart->State = HAL_UART_STATE_BUSY;
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_UART_DISABLE(huart);
|
||||
|
||||
/* Set the address length */
|
||||
MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength);
|
||||
|
||||
/* Enable the Peripheral */
|
||||
__HAL_UART_ENABLE(huart);
|
||||
|
||||
/* TEACK and/or REACK to check before moving huart->State to Ready */
|
||||
return (UART_CheckIdleState(huart));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the UART wake-up from stop mode parameters when triggered by address detection.
|
||||
* @param huart: uart handle
|
||||
* @param WakeUpSelection: UART wake up from stop mode parameters
|
||||
* @retval HAL status
|
||||
*/
|
||||
static void UART_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
|
||||
{
|
||||
assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength));
|
||||
if(WakeUpSelection.AddressLength == UART_ADDRESS_DETECT_4B)
|
||||
{
|
||||
assert_param(IS_UART_4B_ADDRESS(WakeUpSelection.Address));
|
||||
}
|
||||
else
|
||||
{
|
||||
assert_param(IS_UART_7B_ADDRESS(WakeUpSelection.Address));
|
||||
}
|
||||
|
||||
/* Set the USART address length */
|
||||
MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength);
|
||||
|
||||
/* Set the USART address node */
|
||||
MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,289 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_uart_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Header file of UART HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_HAL_UART_EX_H
|
||||
#define __STM32L0xx_HAL_UART_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UARTEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief UART wake up from stop mode parameters
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
|
||||
This parameter can be a value of @ref UARTEx_WakeUp_from_Stop_Selection.
|
||||
If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
|
||||
be filled up. */
|
||||
|
||||
uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
|
||||
This parameter can be a value of @ref UARTEx_WakeUp_Address_Length */
|
||||
|
||||
uint8_t Address; /*!< UART/USART node address (7-bit long max) */
|
||||
} UART_WakeUpTypeDef;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup UARTEx_Extended_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEx_Word_Length UART Word Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M_1)
|
||||
#define UART_WORDLENGTH_8B ((uint32_t)0x0000)
|
||||
#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M_0)
|
||||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_7B) || \
|
||||
((LENGTH) == UART_WORDLENGTH_8B) || \
|
||||
((LENGTH) == UART_WORDLENGTH_9B))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEx_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000)
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1)
|
||||
#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE)
|
||||
#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
|
||||
((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
|
||||
((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
|
||||
((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEx_WakeUp_Address_Length UART WakeUp Address Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADDRESS_DETECT_4B ((uint32_t)0x00000000)
|
||||
#define UART_ADDRESS_DETECT_7B ((uint32_t)USART_CR2_ADDM7)
|
||||
#define IS_UART_ADDRESSLENGTH_DETECT(ADDRESS) (((ADDRESS) == UART_ADDRESS_DETECT_4B) || \
|
||||
((ADDRESS) == UART_ADDRESS_DETECT_7B))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup UARTEx_WakeUp_Methods UART WakeUp Methods
|
||||
* @{
|
||||
*/
|
||||
#define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000)
|
||||
#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
|
||||
#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
|
||||
((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup UARTEx_Extended_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reports the UART clock source.
|
||||
* @param __HANDLE__: specifies the UART Handle
|
||||
* @param __CLOCKSOURCE__ : output variable
|
||||
* @retval UART clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == LPUART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_LPUART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_LPUART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/** @brief Reports the UART mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation.
|
||||
* If PCE = 1, the parity bit is not included in the data extracted
|
||||
* by the reception API().
|
||||
* This masking operation is not carried out in the case of
|
||||
* DMA transfers.
|
||||
* @param __HANDLE__: specifies the UART Handle
|
||||
* @param __MASK__ : output variable
|
||||
* @retval mask to apply to UART RDR register value.
|
||||
*/
|
||||
#define __HAL_UART_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FF ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FF ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FF ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007F ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007F ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003F ; \
|
||||
} \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
/* Peripheral Control functions **********************************************/
|
||||
HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
|
||||
HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Peripheral State functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_UART_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,557 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Header file of USART HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_HAL_USART_H
|
||||
#define __STM32L0xx_HAL_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief USART Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) */
|
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USART_Word_Length */
|
||||
|
||||
uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_Stop_Bits */
|
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Mode */
|
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
|
||||
This parameter can be a value of @ref USART_Clock_Polarity */
|
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_Clock_Phase */
|
||||
|
||||
uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_Last_Bit */
|
||||
}USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_USART_STATE_RESET = 0x00, /*!< Peripheral Reset state */
|
||||
HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
|
||||
HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
|
||||
HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
|
||||
HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
|
||||
HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
|
||||
HAL_USART_STATE_ERROR = 0x04 /*!< Error */
|
||||
}HAL_USART_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL USART Error Code structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_USART_ERROR_NONE = 0x00, /*!< No error */
|
||||
HAL_USART_ERROR_PE = 0x01, /*!< Parity error */
|
||||
HAL_USART_ERROR_NE = 0x02, /*!< Noise error */
|
||||
HAL_USART_ERROR_FE = 0x04, /*!< frame error */
|
||||
HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */
|
||||
HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */
|
||||
}HAL_USART_ErrorTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART clock sources definitions
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
USART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
|
||||
USART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
|
||||
USART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
|
||||
USART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
|
||||
USART_CLOCKSOURCE_LSE = 0x08 /*!< LSE clock source */
|
||||
}USART_ClockSourceTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief HAL USART Error Code structure definition
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief USART handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
USART_TypeDef *Instance; /*!< USART registers base address */
|
||||
|
||||
USART_InitTypeDef Init; /*!< Usart communication parameters */
|
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< Usart Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< Usart Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to Usart Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< Usart Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< Usart Rx Transfer Counter */
|
||||
|
||||
uint16_t Mask; /* USART Rx RDR register mask */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< Usart Tx DMA Handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< Usart Rx DMA Handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
__IO HAL_USART_StateTypeDef State; /*!< Usart communication state */
|
||||
|
||||
__IO HAL_USART_ErrorTypeDef ErrorCode; /*!< USART Error code */
|
||||
|
||||
}USART_HandleTypeDef;
|
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup USART_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Stop_Bits USART Stop Bits
|
||||
* @{
|
||||
*/
|
||||
#define USART_STOPBITS_1 ((uint32_t)0x0000)
|
||||
#define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
|
||||
#define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
|
||||
#define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
|
||||
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
|
||||
((STOPBITS) == USART_STOPBITS_0_5) || \
|
||||
((STOPBITS) == USART_STOPBITS_1_5) || \
|
||||
((STOPBITS) == USART_STOPBITS_2))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Parity USART Parity
|
||||
* @{
|
||||
*/
|
||||
#define USART_PARITY_NONE ((uint32_t)0x0000)
|
||||
#define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
|
||||
#define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
|
||||
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
|
||||
((PARITY) == USART_PARITY_EVEN) || \
|
||||
((PARITY) == USART_PARITY_ODD))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Mode USART Mode
|
||||
* @{
|
||||
*/
|
||||
#define USART_MODE_RX ((uint32_t)USART_CR1_RE)
|
||||
#define USART_MODE_TX ((uint32_t)USART_CR1_TE)
|
||||
#define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
|
||||
#define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFFFFFF3) == 0x00) && ((MODE) != (uint32_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock USART Clock
|
||||
* @{
|
||||
*/
|
||||
#define USART_CLOCK_DISABLED ((uint32_t)0x0000)
|
||||
#define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN)
|
||||
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \
|
||||
((CLOCK) == USART_CLOCK_ENABLED))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Polarity USART Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define USART_POLARITY_LOW ((uint32_t)0x0000)
|
||||
#define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
|
||||
#define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
#define USART_PHASE_1EDGE ((uint32_t)0x0000)
|
||||
#define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
|
||||
#define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Last_Bit
|
||||
* @{
|
||||
*/
|
||||
#define USART_LASTBIT_DISABLE ((uint32_t)0x0000)
|
||||
#define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
|
||||
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
|
||||
((LASTBIT) == USART_LASTBIT_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup USART_Flags USART Flags
|
||||
* Elements values convention: 0xXXXX
|
||||
* - 0xXXXX : Flag mask in the ISR register
|
||||
* @{
|
||||
*/
|
||||
#define USART_FLAG_REACK ((uint32_t)0x00400000)
|
||||
#define USART_FLAG_TEACK ((uint32_t)0x00200000)
|
||||
#define USART_FLAG_BUSY ((uint32_t)0x00010000)
|
||||
#define USART_FLAG_CTS ((uint32_t)0x00000400)
|
||||
#define USART_FLAG_CTSIF ((uint32_t)0x00000200)
|
||||
#define USART_FLAG_LBDF ((uint32_t)0x00000100)
|
||||
#define USART_FLAG_TXE ((uint32_t)0x00000080)
|
||||
#define USART_FLAG_TC ((uint32_t)0x00000040)
|
||||
#define USART_FLAG_RXNE ((uint32_t)0x00000020)
|
||||
#define USART_FLAG_IDLE ((uint32_t)0x00000010)
|
||||
#define USART_FLAG_ORE ((uint32_t)0x00000008)
|
||||
#define USART_FLAG_NE ((uint32_t)0x00000004)
|
||||
#define USART_FLAG_FE ((uint32_t)0x00000002)
|
||||
#define USART_FLAG_PE ((uint32_t)0x00000001)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Interrupt_definition USART Interrupts Definition
|
||||
* Elements values convention: 0000ZZZZ0XXYYYYYb
|
||||
* - YYYYY : Interrupt source position in the XX register (5bits)
|
||||
* - XX : Interrupt source register (2bits)
|
||||
* - 01: CR1 register
|
||||
* - 10: CR2 register
|
||||
* - 11: CR3 register
|
||||
* - ZZZZ : Flag position in the ISR register(4bits)
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028)
|
||||
#define USART_IT_TXE ((uint16_t)0x0727)
|
||||
#define USART_IT_TC ((uint16_t)0x0626)
|
||||
#define USART_IT_RXNE ((uint16_t)0x0525)
|
||||
#define USART_IT_IDLE ((uint16_t)0x0424)
|
||||
#define USART_IT_ERR ((uint16_t)0x0060)
|
||||
|
||||
#define USART_IT_ORE ((uint16_t)0x0300)
|
||||
#define USART_IT_NE ((uint16_t)0x0200)
|
||||
#define USART_IT_FE ((uint16_t)0x0100)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
|
||||
* @{
|
||||
*/
|
||||
#define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
|
||||
#define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
|
||||
#define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
|
||||
#define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
|
||||
#define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
|
||||
#define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
|
||||
#define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Request_Parameters USART Request Parameters
|
||||
* @{
|
||||
*/
|
||||
#define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
|
||||
#define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
|
||||
#define IS_USART_REQUEST_PARAMETER(PARAM) (((PARAM) == USART_RXDATA_FLUSH_REQUEST) || \
|
||||
((PARAM) == USART_TXDATA_FLUSH_REQUEST))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Interruption_Mask USART interruptions flag mask
|
||||
* @{
|
||||
*/
|
||||
#define USART_IT_MASK ((uint16_t)0x001F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup USART_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
/** @brief Reset USART handle state
|
||||
* @param __HANDLE__: specifies the UART Handle.
|
||||
* The Handle Instance which can be USART1 or USART2.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
|
||||
|
||||
/** @brief Checks whether the specified USART flag is set or not.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_FLAG_REACK: Receive enable ackowledge flag
|
||||
* @arg USART_FLAG_TEACK: Transmit enable ackowledge flag
|
||||
* @arg USART_FLAG_BUSY: Busy flag
|
||||
* @arg USART_FLAG_CTS: CTS Change flag
|
||||
* @arg USART_FLAG_TXE: Transmit data register empty flag
|
||||
* @arg USART_FLAG_TC: Transmission Complete flag
|
||||
* @arg USART_FLAG_RXNE: Receive data register not empty flag
|
||||
* @arg USART_FLAG_IDLE: Idle Line detection flag
|
||||
* @arg USART_FLAG_ORE: OverRun Error flag
|
||||
* @arg USART_FLAG_NE: Noise Error flag
|
||||
* @arg USART_FLAG_FE: Framing Error flag
|
||||
* @arg USART_FLAG_PE: Parity Error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
|
||||
/** @brief Enables the specified USART interrupt.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __INTERRUPT__: specifies the USART interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg USART_IT_TC: Transmission complete interrupt
|
||||
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg USART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg USART_IT_PE: Parity Error interrupt
|
||||
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)(((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 |= (1 << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 |= (1 << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1 << ((__INTERRUPT__) & USART_IT_MASK))))
|
||||
|
||||
/** @brief Disables the specified USART interrupt.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __INTERRUPT__: specifies the USART interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg USART_IT_TC: Transmission complete interrupt
|
||||
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg USART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg USART_IT_PE: Parity Error interrupt
|
||||
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & USART_IT_MASK))))
|
||||
|
||||
/** @brief Checks whether the specified USART interrupt has occurred or not.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __IT__: specifies the USART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg USART_IT_TC: Transmission complete interrupt
|
||||
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg USART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg USART_IT_ORE: OverRun Error interrupt
|
||||
* @arg USART_IT_NE: Noise Error interrupt
|
||||
* @arg USART_IT_FE: Framing Error interrupt
|
||||
* @arg USART_IT_PE: Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
|
||||
|
||||
/** @brief Checks whether the specified USART interrupt source is enabled.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __IT__: specifies the USART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg USART_IT_TC: Transmission complete interrupt
|
||||
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg USART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg USART_IT_ORE: OverRun Error interrupt
|
||||
* @arg USART_IT_NE: Noise Error interrupt
|
||||
* @arg USART_IT_FE: Framing Error interrupt
|
||||
* @arg USART_IT_PE: Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \
|
||||
(((uint16_t)(__IT__)) & USART_IT_MASK)))
|
||||
|
||||
|
||||
/** @brief Clears the specified USART ISR flag, in setting the proper ICR register flag.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
|
||||
* to clear the corresponding interrupt
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_CLEAR_PEF: Parity Error Clear Flag
|
||||
* @arg USART_CLEAR_FEF: Framing Error Clear Flag
|
||||
* @arg USART_CLEAR_NEF: Noise detected Clear Flag
|
||||
* @arg USART_CLEAR_OREF: OverRun Error Clear Flag
|
||||
* @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag
|
||||
* @arg USART_CLEAR_TCF: Transmission Complete Clear Flag
|
||||
* @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR |= (uint32_t)(__IT_CLEAR__))
|
||||
|
||||
/** @brief Set a specific USART request flag.
|
||||
* @param __HANDLE__: specifies the USART Handle which can be USART1 or USART2.
|
||||
* @param __REQ__: specifies the request flag to set
|
||||
* This parameter can be one of the following values:
|
||||
* @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
|
||||
* @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
|
||||
|
||||
/** @brief Enable USART
|
||||
* @param __HANDLE__: specifies the USART Handle.
|
||||
* The Handle Instance which can be USART1 or USART2.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
|
||||
/** @brief Disable USART
|
||||
* @param __HANDLE__: specifies the USART Handle.
|
||||
* The Handle Instance which can be USART1 or USART2.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
|
||||
|
||||
/** @brief Check USART Baud rate
|
||||
* @param BAUDRATE: Baudrate specified by the user
|
||||
* The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz)
|
||||
* divided by the smallest oversampling used on the USART (i.e. 8)
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4000001)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include UART HAL Extension module */
|
||||
#include "stm32l0xx_hal_usart_ex.h"
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
|
||||
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_MspInit(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_SetConfig(USART_HandleTypeDef *husart);
|
||||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
|
||||
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
|
||||
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
|
||||
|
||||
/* Peripheral State functions ************************************************/
|
||||
HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
|
||||
uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_USART_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,207 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_usart_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Header file of USART HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_HAL_USART_EX_H
|
||||
#define __STM32L0xx_HAL_USART_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USARTEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup USARTEx_Extended_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USARTEx_Word_Length USART Word Length
|
||||
* @{
|
||||
*/
|
||||
#define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M_1)
|
||||
#define USART_WORDLENGTH_8B ((uint32_t)0x00000000)
|
||||
#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M_0)
|
||||
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_7B) || \
|
||||
((LENGTH) == USART_WORDLENGTH_8B) || \
|
||||
((LENGTH) == USART_WORDLENGTH_9B))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup USARTEx_Extended_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reports the USART clock source.
|
||||
* @param __HANDLE__: specifies the USART Handle
|
||||
* @param __CLOCKSOURCE__ : output variable
|
||||
* @retval the USART clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/** @brief Reports the USART mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation.
|
||||
* If PCE = 1, the parity bit is not included in the data extracted
|
||||
* by the reception API().
|
||||
* This masking operation is not carried out in the case of
|
||||
* DMA transfers.
|
||||
* @param __HANDLE__: specifies the USART Handle
|
||||
* @param __MASK__ : output variable
|
||||
* @retval mask to apply to USART RDR register value.
|
||||
*/
|
||||
#define __HAL_USART_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FF ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FF ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FF ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007F ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007F ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003F ; \
|
||||
} \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Initialization/de-initialization methods **********************************/
|
||||
/* IO operation methods *******************************************************/
|
||||
/* Peripheral Control methods ************************************************/
|
||||
/* Peripheral State methods **************************************************/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_USART_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,456 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_wwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief WWDG HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Window Watchdog (WWDG) peripheral:
|
||||
* + Initialization and de-initialization functions
|
||||
* + IO operation functions
|
||||
* + Peripheral State functions
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### WWDG specific features #####
|
||||
==============================================================================
|
||||
[..]
|
||||
Once enabled the WWDG generates a system reset on expiry of a programmed
|
||||
time period, unless the program refreshes the counter (downcounter)
|
||||
before reaching 0x3F value (i.e. a reset is generated when the counter
|
||||
value rolls over from 0x40 to 0x3F).
|
||||
|
||||
(+) An MCU reset is also generated if the counter value is refreshed
|
||||
before the counter has reached the refresh window value. This
|
||||
implies that the counter must be refreshed in a limited window.
|
||||
(+) Once enabled the WWDG cannot be disabled except by a system reset.
|
||||
(+) WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
|
||||
reset occurs.
|
||||
(+) The WWDG counter input clock is derived from the APB clock divided
|
||||
by a programmable prescaler.
|
||||
(+) WWDG counter clock = PCLK1 / Prescaler
|
||||
WWDG timeout = (WWDG counter clock) * (counter value)
|
||||
(+) Min-max timeout value @32 MHz(PCLK1): ~128.0 us / ~65.54 ms
|
||||
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(+) Enable WWDG APB1 clock using __WWDG_CLK_ENABLE().
|
||||
(+) Set the WWDG prescaler, refresh window and counter value
|
||||
using HAL_WWDG_Init() function.
|
||||
(+) Start the WWDG using HAL_WWDG_Start() function.
|
||||
When the WWDG is enabled the counter value should be configured to
|
||||
a value greater than 0x40 to prevent generating an immediate reset.
|
||||
(+) Optionally you can enable the Early Wakeup Interrupt (EWI) which is
|
||||
generated when the counter reaches 0x40, and then start the WWDG using
|
||||
HAL_WWDG_Start_IT().
|
||||
Once enabled, EWI interrupt cannot be disabled except by a system reset.
|
||||
(+) Then the application program must refresh the WWDG counter at regular
|
||||
intervals during normal operation to prevent an MCU reset, using
|
||||
HAL_WWDG_Refresh() function. This operation must occur only when
|
||||
the counter is lower than the refresh window value already programmed.
|
||||
|
||||
*** WWDG HAL driver macros list ***
|
||||
==================================
|
||||
[..]
|
||||
Below the list of most used macros in WWDG HAL driver.
|
||||
|
||||
(+) __HAL_WWDG_ENABLE: Enable the WWDG peripheral
|
||||
(+) __HAL_WWDG_GET_FLAG: Get the selected WWDG's flag status
|
||||
(+) __HAL_WWDG_CLEAR_FLAG: Clear the WWDG's pending flags
|
||||
(+) __HAL_WWDG_ENABLE_IT: Enables the WWDG early wakeup interrupt
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG
|
||||
* @brief WWDG HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup WWDG_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Group1 Initialization and de-initialization functions
|
||||
* @brief Initialization and Configuration functions.
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### Initialization and de-initialization functions #####
|
||||
==============================================================================
|
||||
[..]
|
||||
This section provides functions allowing to:
|
||||
(+) Initialize the WWDG according to the specified parameters
|
||||
in the WWDG_InitTypeDef and create the associated handle
|
||||
(+) DeInitialize the WWDG peripheral
|
||||
(+) Initialize the WWDG MSP
|
||||
(+) DeInitialize the WWDG MSP
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the WWDG according to the specified
|
||||
* parameters in the WWDG_InitTypeDef and creates the associated handle.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
uint32_t tmp = 0;
|
||||
|
||||
/* Check the WWDG handle allocation */
|
||||
if(hwwdg == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_WWDG_PRESCALER(hwwdg->Init.Prescaler));
|
||||
assert_param(IS_WWDG_WINDOW(hwwdg->Init.Window));
|
||||
assert_param(IS_WWDG_COUNTER(hwwdg->Init.Counter));
|
||||
|
||||
if(hwwdg->State == HAL_WWDG_STATE_RESET)
|
||||
{
|
||||
/* Init the low level hardware */
|
||||
HAL_WWDG_MspInit(hwwdg);
|
||||
}
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_BUSY;
|
||||
|
||||
/* Set WWDG Prescaler and Window */
|
||||
/* Get the CFR register value */
|
||||
tmp = hwwdg->Instance->CFR;
|
||||
|
||||
/* Clear WDGTB[1:0] and W[6:0] bits */
|
||||
tmp &= ((uint32_t)~(WWDG_CFR_WDGTB | WWDG_CFR_W));
|
||||
|
||||
/* Prepare the WWDG Prescaler and Window parameters */
|
||||
tmp |= hwwdg->Init.Prescaler | hwwdg->Init.Window;
|
||||
|
||||
/* Write to WWDG CFR */
|
||||
hwwdg->Instance->CFR = tmp;
|
||||
|
||||
/* Set WWDG Counter */
|
||||
/* Get the CR register value */
|
||||
tmp = hwwdg->Instance->CR;
|
||||
|
||||
/* Clear T[6:0] bits */
|
||||
tmp &= (uint32_t)~((uint32_t)WWDG_CR_T);
|
||||
|
||||
/* Prepare the WWDG Counter parameter */
|
||||
tmp |= (hwwdg->Init.Counter);
|
||||
|
||||
/* Write to WWDG CR */
|
||||
hwwdg->Instance->CR = tmp;
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_READY;
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the WWDG peripheral.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_BUSY;
|
||||
|
||||
/* DeInit the low level hardware */
|
||||
HAL_WWDG_MspDeInit(hwwdg);
|
||||
|
||||
/* Reset WWDG Control register */
|
||||
hwwdg->Instance->CR = (uint32_t)0x0000007F;
|
||||
|
||||
/* Reset WWDG Configuration register */
|
||||
hwwdg->Instance->CFR = (uint32_t)0x0000007F;
|
||||
|
||||
/* Reset WWDG Status register */
|
||||
hwwdg->Instance->SR = 0;
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_RESET;
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hwwdg);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the WWDG MSP.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
/* NOTE: This function Should not be modified, when the callback is needed,
|
||||
the HAL_WWDG_MspInit could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the WWDG MSP.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_WWDG_MspDeInit(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
/* NOTE: This function Should not be modified, when the callback is needed,
|
||||
the HAL_WWDG_MspDeInit could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Group2 IO operation functions
|
||||
* @brief IO operation functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### IO operation functions #####
|
||||
==============================================================================
|
||||
[..]
|
||||
This section provides functions allowing to:
|
||||
(+) Start the WWDG.
|
||||
(+) Refresh the WWDG.
|
||||
(+) Handle WWDG interrupt request.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Starts the WWDG.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_WWDG_Start(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hwwdg);
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_BUSY;
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_WWDG_ENABLE(hwwdg);
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hwwdg);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the WWDG with interrupt enabled.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_WWDG_Start_IT(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hwwdg);
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_BUSY;
|
||||
|
||||
/* Enable the Early Wakeup Interrupt */
|
||||
__HAL_WWDG_ENABLE_IT(WWDG_IT_EWI);
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_WWDG_ENABLE(hwwdg);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Refreshes the WWDG.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t Counter)
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hwwdg);
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_BUSY;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_WWDG_COUNTER(Counter));
|
||||
|
||||
/* Write to WWDG CR the WWDG Counter value to refresh with */
|
||||
MODIFY_REG(hwwdg->Instance->CR, (uint32_t)WWDG_CR_T, Counter);
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_READY;
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hwwdg);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Handles WWDG interrupt request.
|
||||
* @note The Early Wakeup Interrupt (EWI) can be used if specific safety operations
|
||||
* or data logging must be performed before the actual reset is generated.
|
||||
* The EWI interrupt is enabled using __HAL_WWDG_ENABLE_IT() macro.
|
||||
* When the downcounter reaches the value 0x40, and EWI interrupt is
|
||||
* generated and the corresponding Interrupt Service Routine (ISR) can
|
||||
* be used to trigger specific actions (such as communications or data
|
||||
* logging), before resetting the device.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
/* WWDG Early Wakeup Interrupt occurred */
|
||||
if(__HAL_WWDG_GET_FLAG(hwwdg, WWDG_FLAG_EWIF) != RESET)
|
||||
{
|
||||
/* Early Wakeup callback */
|
||||
HAL_WWDG_WakeupCallback(hwwdg);
|
||||
|
||||
/* Change WWDG peripheral state */
|
||||
hwwdg->State = HAL_WWDG_STATE_READY;
|
||||
|
||||
/* Clear the WWDG Data Ready flag */
|
||||
__HAL_WWDG_CLEAR_FLAG(hwwdg, WWDG_FLAG_EWIF);
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hwwdg);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Early Wakeup WWDG callback.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_WWDG_WakeupCallback(WWDG_HandleTypeDef* hwwdg)
|
||||
{
|
||||
/* NOTE: This function Should not be modified, when the callback is needed,
|
||||
the HAL_WWDG_WakeupCallback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Group3 Peripheral State functions
|
||||
* @brief Peripheral State functions.
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### Peripheral State functions #####
|
||||
==============================================================================
|
||||
[..]
|
||||
This subsection permits to get in run-time the status of the peripheral
|
||||
and the data flow.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Returns the WWDG state.
|
||||
* @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified WWDG module.
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_WWDG_StateTypeDef HAL_WWDG_GetState(WWDG_HandleTypeDef *hwwdg)
|
||||
{
|
||||
return hwwdg->State;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,269 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_wwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Header file of WWDG HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_HAL_WWDG_H
|
||||
#define __STM32L0xx_HAL_WWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup WWDG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief WWDG HAL State Structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_WWDG_STATE_RESET = 0x00, /*!< WWDG not yet initialized or disabled */
|
||||
HAL_WWDG_STATE_READY = 0x01, /*!< WWDG initialized and ready for use */
|
||||
HAL_WWDG_STATE_BUSY = 0x02, /*!< WWDG internal process is ongoing */
|
||||
HAL_WWDG_STATE_TIMEOUT = 0x03, /*!< WWDG timeout state */
|
||||
HAL_WWDG_STATE_ERROR = 0x04 /*!< WWDG error state */
|
||||
|
||||
}HAL_WWDG_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief WWDG Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG.
|
||||
This parameter can be a value of @ref WWDG_Prescaler */
|
||||
|
||||
uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter.
|
||||
This parameter must be a number lower than Max_Data = 0x80 */
|
||||
|
||||
uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value.
|
||||
This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */
|
||||
|
||||
}WWDG_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief WWDG handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
WWDG_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
WWDG_InitTypeDef Init; /*!< WWDG required parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< WWDG locking object */
|
||||
|
||||
__IO HAL_WWDG_StateTypeDef State; /*!< WWDG communication state */
|
||||
|
||||
}WWDG_HandleTypeDef;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup WWDG_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_BitAddress_AliasRegion
|
||||
* @brief WWDG registers bit address in the alias region
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* --- CFR Register ---*/
|
||||
/* Alias word address of EWI bit */
|
||||
#define CFR_BASE (uint32_t)(WWDG_BASE + 0x04)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Interrupt_definition
|
||||
* @{
|
||||
*/
|
||||
#define WWDG_IT_EWI ((uint32_t)WWDG_CFR_EWI)
|
||||
|
||||
#define IS_WWDG_IT(IT) ((IT) == WWDG_IT_EWI)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Flag_definition
|
||||
* @brief WWDG Flag definition
|
||||
* @{
|
||||
*/
|
||||
#define WWDG_FLAG_EWIF ((uint32_t)0x0001) /*!< Early wakeup interrupt flag */
|
||||
|
||||
#define IS_WWDG_FLAG(FLAG) ((FLAG) == WWDG_FLAG_EWIF))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define WWDG_PRESCALER_1 ((uint32_t)0x00000000) /*!< WWDG counter clock = (PCLK1/4096)/1 */
|
||||
#define WWDG_PRESCALER_2 ((uint32_t)0x00000080) /*!< WWDG counter clock = (PCLK1/4096)/2 */
|
||||
#define WWDG_PRESCALER_4 ((uint32_t)0x00000100) /*!< WWDG counter clock = (PCLK1/4096)/4 */
|
||||
#define WWDG_PRESCALER_8 ((uint32_t)0x00000180) /*!< WWDG counter clock = (PCLK1/4096)/8 */
|
||||
|
||||
#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_PRESCALER_1) || \
|
||||
((PRESCALER) == WWDG_PRESCALER_2) || \
|
||||
((PRESCALER) == WWDG_PRESCALER_4) || \
|
||||
((PRESCALER) == WWDG_PRESCALER_8))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Window
|
||||
* @{
|
||||
*/
|
||||
#define IS_WWDG_WINDOW(WINDOW) ((WINDOW) <= 0x7F)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_Counter
|
||||
* @{
|
||||
*/
|
||||
#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup WWDG_Exported_Macro
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset WWDG handle state
|
||||
* @param __HANDLE__: WWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_WWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_WWDG_STATE_RESET)
|
||||
|
||||
/**
|
||||
* @brief Enables the WWDG peripheral.
|
||||
* @param __HANDLE__: WWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_WWDG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= WWDG_CR_WDGA)
|
||||
|
||||
/**
|
||||
* @brief Gets the selected WWDG's flag status.
|
||||
* @param __HANDLE__: WWDG handle
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
|
||||
* @retval The new state of WWDG_FLAG (SET or RESET).
|
||||
*/
|
||||
#define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Clears the WWDG's pending flags.
|
||||
* @param __HANDLE__: WWDG handle
|
||||
* @param __FLAG__: specifies the flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) &= ~(__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Enables the WWDG early wakeup interrupt.
|
||||
* @param __INTERRUPT__: specifies the interrupt to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg WWDG_IT_EWI: Early wakeup interrupt
|
||||
* @note Once enabled this interrupt cannot be disabled except by a system reset.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_WWDG_ENABLE_IT(__INTERRUPT__) (*(__IO uint32_t *) CFR_BASE |= (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg);
|
||||
HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg);
|
||||
void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
|
||||
void HAL_WWDG_MspDeInit(WWDG_HandleTypeDef *hwwdg);
|
||||
void HAL_WWDG_WakeupCallback(WWDG_HandleTypeDef* hwwdg);
|
||||
|
||||
/* I/O operation functions ******************************************************/
|
||||
HAL_StatusTypeDef HAL_WWDG_Start(WWDG_HandleTypeDef *hwwdg);
|
||||
HAL_StatusTypeDef HAL_WWDG_Start_IT(WWDG_HandleTypeDef *hwwdg);
|
||||
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t Counter);
|
||||
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
|
||||
|
||||
/* Peripheral State functions **************************************************/
|
||||
HAL_WWDG_StateTypeDef HAL_WWDG_GetState(WWDG_HandleTypeDef *hwwdg);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_WWDG_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,471 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32l0xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32l0xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* This file configures the system clock as follows:
|
||||
*-----------------------------------------------------------------------------
|
||||
* System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
|
||||
* | (external 8 MHz clock) | (internal 16 MHz)
|
||||
* | 2- PLL_HSE_XTAL |
|
||||
* | (external 8 MHz xtal) |
|
||||
*-----------------------------------------------------------------------------
|
||||
* SYSCLK(MHz) | 32 | 32
|
||||
*-----------------------------------------------------------------------------
|
||||
* AHBCLK (MHz) | 32 | 32
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB1CLK (MHz) | 32 | 32
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB2CLK (MHz) | 32 | 32
|
||||
*-----------------------------------------------------------------------------
|
||||
* USB capable (48 MHz precise clock) | YES | YES
|
||||
*-----------------------------------------------------------------------------
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l0xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32l0xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE ((uint32_t)2000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
|
||||
#define USE_PLL_HSE_EXTC (1) /* Use external clock */
|
||||
#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 32000000;
|
||||
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
|
||||
const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint32_t MSIRangeTable[7] = {64000, 128000, 256000, 512000, 1000000, 2000000, 4000000};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||
#endif
|
||||
|
||||
uint8_t SetSysClock_PLL_HSI(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
/*!< Set MSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000100;
|
||||
|
||||
/*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
|
||||
RCC->CFGR &= (uint32_t) 0x88FF400C;
|
||||
|
||||
/*!< Reset HSION, HSIDIVEN, HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFF6;
|
||||
|
||||
/*!< Reset HSI48ON bit */
|
||||
RCC->CRRCR &= (uint32_t)0xFFFFFFFE;
|
||||
|
||||
/*!< Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
|
||||
RCC->CFGR &= (uint32_t)0xFF02FFFF;
|
||||
|
||||
/*!< Disable all interrupts */
|
||||
RCC->CIER = 0x00000000;
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
|
||||
/* Configure the Cube driver */
|
||||
HAL_Init();
|
||||
|
||||
/* Configure the System clock source, PLL Multiplier and Divider factors,
|
||||
AHB/APBx prescalers and Flash settings */
|
||||
SetSysClock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock according to Clock Register Values
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
|
||||
* value as defined by the MSI range.
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value
|
||||
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* MSI used as system clock */
|
||||
SystemCoreClock = ((1 <<((RCC->ICSCR & RCC_ICSCR_MSIRANGE)>>13 ))* 64000);
|
||||
break;
|
||||
case 0x04: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x08: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x0C: /* PLL used as system clock */
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
|
||||
pllmul = PLLMulTable[(pllmul >> 18)];
|
||||
plldiv = (plldiv >> 22) + 1;
|
||||
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
|
||||
if (pllsource == 0x00)
|
||||
{
|
||||
/* HSI oscillator clock selected as PLL clock entry */
|
||||
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSE selected as PLL clock entry */
|
||||
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
|
||||
}
|
||||
break;
|
||||
default: /* MSI used as system clock */
|
||||
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
|
||||
SystemCoreClock = (32768 * (1 << (msirange + 1)));
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||
* AHB/APBx prescalers and Flash settings
|
||||
* @note This function should be called only once the RCC clock configuration
|
||||
* is reset to the default reset state (done in SystemInit() function).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SetSysClock(void)
|
||||
{
|
||||
/* 1- Try to start with HSE and external clock */
|
||||
#if USE_PLL_HSE_EXTC != 0
|
||||
if (SetSysClock_PLL_HSE(1) == 0)
|
||||
#endif
|
||||
{
|
||||
/* 2- If fail try to start with HSE and external xtal */
|
||||
#if USE_PLL_HSE_XTAL != 0
|
||||
if (SetSysClock_PLL_HSE(0) == 0)
|
||||
#endif
|
||||
{
|
||||
/* 3- If fail start with HSI clock */
|
||||
if (SetSysClock_PLL_HSI() == 0)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
// [TODO] Put something here to tell the user that a problem occured...
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
|
||||
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI48, RCC_MCODIV_1);
|
||||
}
|
||||
|
||||
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSE) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Used to gain time after DeepSleep in case HSI is used */
|
||||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
|
||||
if (bypass == 0)
|
||||
{
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||
}
|
||||
else
|
||||
{
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||
}
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */
|
||||
// PLLCLK = (8 MHz * 8)/2 = 32 MHz
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_8;
|
||||
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||
//if (bypass == 0)
|
||||
// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
|
||||
//else
|
||||
// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
#endif
|
||||
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSI) used as System clock source */
|
||||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSI(void)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/* Enable HSI and HSI48 oscillators and activate PLL with HSI as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */
|
||||
// PLLCLK = (16 MHz * 4)/2 = 32 MHz
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_4;
|
||||
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 32 MHz
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 32 MHz
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||
{
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
|
||||
/* Used for the different timeouts in the HAL */
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
HAL_IncTick();
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,123 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32l0xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Header File.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l0xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32L0XX_H
|
||||
#define __SYSTEM_STM32L0XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L0xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
extern void SetSysClock(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32L0XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Loading…
Reference in New Issue