mirror of https://github.com/ARMmbed/mbed-os.git
mbed_atomic_impl.h: Add pre-op (xxx_fetch) forms
Even though C/C++11 don't offer pre-op forms (that do the operation then return the new value) of their freestanding functions, we will be making them visible via pre-op operators on `Atomic<T>` (++, --, +=, -=, &=, |=, ^=). It is easier to do a pre-op than a post-op, as we can use one fewer register in the assembler, so it's worth optimising for what will be quite common cases. Make these forms accessible for `Atomic<T>`, but don't document them for standalone use at this stage.pull/10274/head
Kevin Bracey
parent
607856ee9a
commit
f9f887d88e
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@ -132,14 +132,49 @@ extern "C" {
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#endif
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#ifdef __CC_ARM
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#define DO_MBED_LOCKFREE_3OP_ASM(OP, Constants, M) \
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#define DO_MBED_LOCKFREE_NEWVAL_2OP_ASM(OP, Constants, M) \
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__asm { \
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LDREX##M newValue, [valuePtr] ; \
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OP newValue, arg ; \
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STREX##M fail, newValue, [valuePtr] \
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}
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#elif defined __clang__ || defined __GNUC__
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#define DO_MBED_LOCKFREE_NEWVAL_2OP_ASM(OP, Constants, M) \
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__asm volatile ( \
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"LDREX"#M "\t%[newValue], %[value]\n\t" \
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#OP "\t%[newValue], %[arg]\n\t" \
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"STREX"#M "\t%[fail], %[newValue], %[value]\n\t" \
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: [newValue] "=&" MBED_DOP_REG (newValue), \
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[fail] "=&r" (fail), \
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[value] "+Q" (*valuePtr) \
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: [arg] Constants MBED_DOP_REG (arg) \
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: "cc" \
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)
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#elif defined __ICCARM__
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/* In IAR "r" means low register if Thumbv1 (there's no way to specify any register...) */
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/* IAR does not support "ADDS reg, reg", so write as 3-operand */
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#define DO_MBED_LOCKFREE_NEWVAL_2OP_ASM(OP, Constants, M) \
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asm volatile ( \
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"LDREX"#M "\t%[newValue], [%[valuePtr]]\n" \
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#OP "\t%[newValue], %[newValue], %[arg]\n" \
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"STREX"#M "\t%[fail], %[newValue], [%[valuePtr]]\n" \
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: [newValue] "=&r" (newValue), \
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[fail] "=&r" (fail) \
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: [valuePtr] "r" (valuePtr), \
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[arg] "r" (arg) \
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: "memory", "cc" \
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)
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#endif
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#ifdef __CC_ARM
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#define DO_MBED_LOCKFREE_OLDVAL_3OP_ASM(OP, Constants, M) \
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__asm { \
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LDREX##M oldValue, [valuePtr] ; \
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OP newValue, oldValue, arg ; \
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STREX##M fail, newValue, [valuePtr] \
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}
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#elif defined __clang__ || defined __GNUC__
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#define DO_MBED_LOCKFREE_3OP_ASM(OP, Constants, M) \
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#define DO_MBED_LOCKFREE_OLDVAL_3OP_ASM(OP, Constants, M) \
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__asm volatile ( \
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".syntax unified\n\t" \
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"LDREX"#M "\t%[oldValue], %[value]\n\t" \
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@ -154,7 +189,7 @@ extern "C" {
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)
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#elif defined __ICCARM__
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/* In IAR "r" means low register if Thumbv1 (there's no way to specify any register...) */
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#define DO_MBED_LOCKFREE_3OP_ASM(OP, Constants, M) \
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#define DO_MBED_LOCKFREE_OLDVAL_3OP_ASM(OP, Constants, M) \
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asm volatile ( \
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"LDREX"#M "\t%[oldValue], [%[valuePtr]]\n" \
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#OP "\t%[newValue], %[oldValue], %[arg]\n" \
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@ -172,7 +207,7 @@ extern "C" {
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* are only 2-operand versions of the instructions.
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*/
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#ifdef __CC_ARM
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#define DO_MBED_LOCKFREE_2OP_ASM(OP, Constants, M) \
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#define DO_MBED_LOCKFREE_OLDVAL_2OP_ASM(OP, Constants, M) \
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__asm { \
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LDREX##M oldValue, [valuePtr] ; \
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MOV newValue, oldValue ; \
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@ -180,7 +215,7 @@ extern "C" {
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STREX##M fail, newValue, [valuePtr] \
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}
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#elif defined __clang__ || defined __GNUC__
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#define DO_MBED_LOCKFREE_2OP_ASM(OP, Constants, M) \
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#define DO_MBED_LOCKFREE_OLDVAL_2OP_ASM(OP, Constants, M) \
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__asm volatile ( \
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".syntax unified\n\t" \
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"LDREX"#M "\t%[oldValue], %[value]\n\t" \
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@ -195,7 +230,7 @@ extern "C" {
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: "cc" \
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)
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#elif defined __ICCARM__
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#define DO_MBED_LOCKFREE_2OP_ASM(OP, Constants, M) \
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#define DO_MBED_LOCKFREE_OLDVAL_2OP_ASM(OP, Constants, M) \
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asm volatile ( \
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"LDREX"#M "\t%[oldValue], [%[valuePtr]]\n" \
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"MOV" "\t%[newValue], %[oldValue]\n" \
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@ -444,17 +479,41 @@ MBED_FORCEINLINE bool core_util_atomic_cas_explicit_##fn_suffix(volatile T *ptr,
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}
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#define DO_MBED_LOCKFREE_2OP(name, OP, Constants, retValue, T, fn_suffix, M) \
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#define DO_MBED_LOCKFREE_NEWVAL_2OP(name, OP, Constants, T, fn_suffix, M) \
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inline T core_util_atomic_##name##_##fn_suffix(volatile T *valuePtr, T arg) \
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{ \
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uint32_t fail, newValue; \
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MBED_BARRIER(); \
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do { \
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DO_MBED_LOCKFREE_NEWVAL_2OP_ASM(OP, Constants, M); \
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} while (fail); \
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MBED_BARRIER(); \
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return (T) newValue; \
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} \
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\
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MBED_FORCEINLINE T core_util_atomic_##name##_explicit_##fn_suffix( \
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volatile T *valuePtr, T arg, mbed_memory_order order) \
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{ \
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uint32_t fail, newValue; \
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MBED_RELEASE_BARRIER(order); \
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do { \
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DO_MBED_LOCKFREE_NEWVAL_2OP_ASM(OP, Constants, M); \
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} while (fail); \
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MBED_ACQUIRE_BARRIER(order); \
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return (T) newValue; \
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} \
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#define DO_MBED_LOCKFREE_OLDVAL_2OP(name, OP, Constants, T, fn_suffix, M) \
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inline T core_util_atomic_##name##_##fn_suffix(volatile T *valuePtr, T arg) \
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{ \
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T oldValue; \
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uint32_t fail, newValue; \
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MBED_BARRIER(); \
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do { \
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DO_MBED_LOCKFREE_2OP_ASM(OP, Constants, M); \
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DO_MBED_LOCKFREE_OLDVAL_2OP_ASM(OP, Constants, M); \
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} while (fail); \
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MBED_BARRIER(); \
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return (T) retValue; \
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return oldValue; \
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} \
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\
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MBED_FORCEINLINE T core_util_atomic_##name##_explicit_##fn_suffix( \
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@ -464,22 +523,22 @@ MBED_FORCEINLINE T core_util_atomic_##name##_explicit_##fn_suffix(
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uint32_t fail, newValue; \
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MBED_RELEASE_BARRIER(order); \
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do { \
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DO_MBED_LOCKFREE_2OP_ASM(OP, Constants, M); \
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DO_MBED_LOCKFREE_OLDVAL_2OP_ASM(OP, Constants, M); \
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} while (fail); \
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MBED_ACQUIRE_BARRIER(order); \
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return (T) retValue; \
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return oldValue; \
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} \
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#define DO_MBED_LOCKFREE_3OP(name, OP, Constants, retValue, T, fn_suffix, M) \
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#define DO_MBED_LOCKFREE_OLDVAL_3OP(name, OP, Constants, T, fn_suffix, M) \
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inline T core_util_atomic_##name##_##fn_suffix(volatile T *valuePtr, T arg) { \
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T oldValue; \
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uint32_t fail, newValue; \
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MBED_BARRIER(); \
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do { \
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DO_MBED_LOCKFREE_3OP_ASM(OP, Constants, M); \
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DO_MBED_LOCKFREE_OLDVAL_3OP_ASM(OP, Constants, M); \
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} while (fail); \
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MBED_BARRIER(); \
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return (T) retValue; \
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return oldValue; \
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} \
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\
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MBED_FORCEINLINE T core_util_atomic_##name##_explicit_##fn_suffix( \
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@ -489,10 +548,10 @@ MBED_FORCEINLINE T core_util_atomic_##name##_explicit_##fn_suffix(
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uint32_t fail, newValue; \
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MBED_RELEASE_BARRIER(order); \
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do { \
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DO_MBED_LOCKFREE_3OP_ASM(OP, Constants, M); \
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DO_MBED_LOCKFREE_OLDVAL_3OP_ASM(OP, Constants, M); \
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} while (fail); \
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MBED_ACQUIRE_BARRIER(order); \
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return (T) retValue; \
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return oldValue; \
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} \
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inline bool core_util_atomic_flag_test_and_set(volatile core_util_atomic_flag *valuePtr)
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@ -526,15 +585,20 @@ MBED_FORCEINLINE bool core_util_atomic_flag_test_and_set_explicit(volatile core_
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DO_MBED_LOCKFREE_EXCHG_OP(uint16_t, u16, H) \
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DO_MBED_LOCKFREE_EXCHG_OP(uint32_t, u32, )
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#define DO_MBED_LOCKFREE_3OPS(name, OP, Constants, retValue) \
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DO_MBED_LOCKFREE_3OP(name, OP, Constants, retValue, uint8_t, u8, B) \
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DO_MBED_LOCKFREE_3OP(name, OP, Constants, retValue, uint16_t, u16, H) \
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DO_MBED_LOCKFREE_3OP(name, OP, Constants, retValue, uint32_t, u32, )
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#define DO_MBED_LOCKFREE_NEWVAL_2OPS(name, OP, Constants) \
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DO_MBED_LOCKFREE_NEWVAL_2OP(name, OP, Constants, uint8_t, u8, B) \
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DO_MBED_LOCKFREE_NEWVAL_2OP(name, OP, Constants, uint16_t, u16, H) \
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DO_MBED_LOCKFREE_NEWVAL_2OP(name, OP, Constants, uint32_t, u32, )
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#define DO_MBED_LOCKFREE_2OPS(name, OP, Constants, retValue) \
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DO_MBED_LOCKFREE_2OP(name, OP, Constants, retValue, uint8_t, u8, B) \
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DO_MBED_LOCKFREE_2OP(name, OP, Constants, retValue, uint16_t, u16, H) \
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DO_MBED_LOCKFREE_2OP(name, OP, Constants, retValue, uint32_t, u32, )
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#define DO_MBED_LOCKFREE_OLDVAL_3OPS(name, OP, Constants) \
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DO_MBED_LOCKFREE_OLDVAL_3OP(name, OP, Constants, uint8_t, u8, B) \
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DO_MBED_LOCKFREE_OLDVAL_3OP(name, OP, Constants, uint16_t, u16, H) \
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DO_MBED_LOCKFREE_OLDVAL_3OP(name, OP, Constants, uint32_t, u32, )
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#define DO_MBED_LOCKFREE_OLDVAL_2OPS(name, OP, Constants) \
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DO_MBED_LOCKFREE_OLDVAL_2OP(name, OP, Constants, uint8_t, u8, B) \
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DO_MBED_LOCKFREE_OLDVAL_2OP(name, OP, Constants, uint16_t, u16, H) \
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DO_MBED_LOCKFREE_OLDVAL_2OP(name, OP, Constants, uint32_t, u32, )
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#define DO_MBED_LOCKFREE_CAS_STRONG_OPS() \
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DO_MBED_LOCKFREE_CAS_STRONG_OP(uint8_t, u8, B) \
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@ -546,6 +610,11 @@ MBED_FORCEINLINE bool core_util_atomic_flag_test_and_set_explicit(volatile core_
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DO_MBED_LOCKFREE_CAS_WEAK_OP(uint16_t, u16, H) \
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DO_MBED_LOCKFREE_CAS_WEAK_OP(uint32_t, u32, )
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// Note that these macros define a number of functions that are
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// not in mbed_atomic.h, like core_util_atomic_and_fetch_u16.
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// These are not documented via the doxygen in mbed_atomic.h, so
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// for now should be regarded as internal only. They are used by the
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// Atomic<T> template as an optimisation though.
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// We always use the "S" form of operations - avoids yet another
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// possible unneeded distinction between Thumbv1 and Thumbv2, and
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@ -559,33 +628,42 @@ MBED_FORCEINLINE bool core_util_atomic_flag_test_and_set_explicit(volatile core_
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// of the 16-bit forms. Shame we can't specify "don't care"
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// for the "S", or get the GNU multi-alternative to
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// choose ADDS/ADD appropriately.
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DO_MBED_LOCKFREE_3OPS(incr, ADDS, "IL", newValue)
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DO_MBED_LOCKFREE_3OPS(decr, SUBS, "IL", newValue)
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DO_MBED_LOCKFREE_3OPS(fetch_add, ADDS, "IL", oldValue)
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DO_MBED_LOCKFREE_3OPS(fetch_sub, SUBS, "IL", oldValue)
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_add, ADDS, "IL")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(incr, ADDS, "IL")
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_sub, SUBS, "IL")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(decr, SUBS, "IL")
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// K constraint is inverted 12-bit modified immediate constant
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// (relying on assembler substituting BIC for AND)
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DO_MBED_LOCKFREE_3OPS(fetch_and, ANDS, "IK", oldValue)
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_and, ANDS, "IK")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(and_fetch, ANDS, "IK")
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#if MBED_EXCLUSIVE_ACCESS_ARM
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// ARM does not have ORN instruction, so take plain immediates.
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DO_MBED_LOCKFREE_3OPS(fetch_or, ORRS, "I", oldValue)
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_or, ORRS, "I")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(or_fetch, ORRS, "I")
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#else
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// Thumb-2 has ORN instruction, and assembler substitutes ORN for ORR.
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DO_MBED_LOCKFREE_3OPS(fetch_or, ORRS, "IK", oldValue)
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_or, ORRS, "IK")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(or_fetch, ORRS, "IK")
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#endif
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// I constraint is 12-bit modified immediate operand
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DO_MBED_LOCKFREE_3OPS(fetch_xor, EORS, "I", oldValue)
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_xor, EORS, "I")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(xor_fetch, EORS, "I")
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#else // MBED_EXCLUSIVE_ACCESS_THUMB1
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// I constraint is 0-255; J is -255 to -1, suitable for
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// 2-op ADD/SUB (relying on assembler to swap ADD/SUB)
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// L constraint is -7 to +7, suitable for 3-op ADD/SUB
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// (relying on assembler to swap ADD/SUB)
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DO_MBED_LOCKFREE_3OPS(incr, ADDS, "L", newValue)
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DO_MBED_LOCKFREE_3OPS(decr, SUBS, "L", newValue)
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DO_MBED_LOCKFREE_3OPS(fetch_add, ADDS, "L", oldValue)
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DO_MBED_LOCKFREE_3OPS(fetch_sub, SUBS, "L", oldValue)
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DO_MBED_LOCKFREE_2OPS(fetch_and, ANDS, "", oldValue)
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DO_MBED_LOCKFREE_2OPS(fetch_or, ORRS, "", oldValue)
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DO_MBED_LOCKFREE_2OPS(fetch_xor, EORS, "", oldValue)
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_add, ADDS, "L")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(incr, ADDS, "IJ")
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DO_MBED_LOCKFREE_OLDVAL_3OPS(fetch_sub, SUBS, "L")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(decr, SUBS, "IJ")
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DO_MBED_LOCKFREE_OLDVAL_2OPS(fetch_and, ANDS, "")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(and_fetch, ANDS, "")
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DO_MBED_LOCKFREE_OLDVAL_2OPS(fetch_or, ORRS, "")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(or_fetch, ORRS, "")
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DO_MBED_LOCKFREE_OLDVAL_2OPS(fetch_xor, EORS, "")
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DO_MBED_LOCKFREE_NEWVAL_2OPS(xor_fetch, EORS, "")
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#endif
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DO_MBED_LOCKFREE_EXCHG_OPS()
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@ -1236,6 +1314,20 @@ inline T *core_util_atomic_fetch_sub_explicit(T *volatile *valuePtr, ptrdiff_t a
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DO_MBED_ATOMIC_OP_TEMPLATE(name, int32_t, s32) \
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DO_MBED_ATOMIC_OP_TEMPLATE(name, int64_t, s64)
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#define DO_MBED_ATOMIC_MANUAL_PRE_OP_TEMPLATE(name, T, fn_suffix, postname, OP) \
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template<> \
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inline T core_util_atomic_##name(volatile T *valuePtr, T arg) \
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{ \
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return core_util_atomic_##postname##_##fn_suffix(valuePtr, arg) OP; \
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} \
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\
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template<> \
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inline T core_util_atomic_##name##_explicit(volatile T *valuePtr, T arg, \
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mbed_memory_order order) \
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{ \
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return core_util_atomic_##postname##_explicit_##fn_suffix(valuePtr, arg, order) OP; \
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}
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DO_MBED_ATOMIC_OP_U_TEMPLATES(exchange)
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DO_MBED_ATOMIC_OP_S_TEMPLATES(exchange)
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DO_MBED_ATOMIC_OP_U_TEMPLATES(fetch_add)
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@ -1246,25 +1338,61 @@ DO_MBED_ATOMIC_OP_U_TEMPLATES(fetch_and)
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DO_MBED_ATOMIC_OP_U_TEMPLATES(fetch_or)
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DO_MBED_ATOMIC_OP_U_TEMPLATES(fetch_xor)
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namespace mbed {
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namespace impl {
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// Use custom assembler forms for pre-ops where available, else construct from post-ops
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#if MBED_EXCLUSIVE_ACCESS
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#define DO_MBED_ATOMIC_PRE_OP_TEMPLATES(name, postname, OP) \
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template<typename T> T core_util_atomic_##name(volatile T *valuePtr, T arg); \
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template<typename T> T core_util_atomic_##name##_explicit(volatile T *valuePtr, T arg, mbed_memory_order order); \
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DO_MBED_ATOMIC_OP_TEMPLATE(name, uint8_t, u8) \
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DO_MBED_ATOMIC_OP_TEMPLATE(name, uint16_t, u16) \
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DO_MBED_ATOMIC_OP_TEMPLATE(name, uint32_t, u32) \
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DO_MBED_ATOMIC_MANUAL_PRE_OP_TEMPLATE(name, uint64_t, u64, postname, OP)
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#else
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#define DO_MBED_ATOMIC_PRE_OP_TEMPLATES(name, postname, OP) \
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template<typename T> T core_util_atomic_##name(volatile T *valuePtr, T arg); \
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template<typename T> T core_util_atomic_##name##_explicit(volatile T *valuePtr, T arg, mbed_memory_order order); \
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DO_MBED_ATOMIC_MANUAL_PRE_OP_TEMPLATE(name, uint8_t, u8, postname, OP) \
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DO_MBED_ATOMIC_MANUAL_PRE_OP_TEMPLATE(name, uint16_t, u16, postname, OP) \
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DO_MBED_ATOMIC_MANUAL_PRE_OP_TEMPLATE(name, uint32_t, u32, postname, OP) \
|
||||
DO_MBED_ATOMIC_MANUAL_PRE_OP_TEMPLATE(name, uint64_t, u64, postname, OP)
|
||||
#endif
|
||||
|
||||
// *INDENT-OFF*
|
||||
DO_MBED_ATOMIC_PRE_OP_TEMPLATES(incr, fetch_add, + arg)
|
||||
DO_MBED_ATOMIC_PRE_OP_TEMPLATES(decr, fetch_sub, - arg)
|
||||
DO_MBED_ATOMIC_PRE_OP_TEMPLATES(and_fetch, fetch_and, & arg)
|
||||
DO_MBED_ATOMIC_PRE_OP_TEMPLATES(or_fetch, fetch_or, | arg)
|
||||
DO_MBED_ATOMIC_PRE_OP_TEMPLATES(xor_fetch, fetch_xor, ^ arg)
|
||||
// *INDENT-ON*
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
#endif // __cplusplus
|
||||
|
||||
#undef MBED_DOP_REG
|
||||
#undef MBED_CMP_IMM
|
||||
#undef MBED_SUB3_IMM
|
||||
#undef DO_MBED_LOCKFREE_EXCHG_ASM
|
||||
#undef DO_MBED_LOCKFREE_3OP_ASM
|
||||
#undef DO_MBED_LOCKFREE_2OP_ASM
|
||||
#undef DO_MBED_LOCKFREE_NEWVAL_2OP_ASM
|
||||
#undef DO_MBED_LOCKFREE_OLDVAL_3OP_ASM
|
||||
#undef DO_MBED_LOCKFREE_OLDVAL_2OP_ASM
|
||||
#undef DO_MBED_LOCKFREE_CAS_WEAK_ASM
|
||||
#undef DO_MBED_LOCKFREE_CAS_STRONG_ASM
|
||||
#undef DO_MBED_LOCKFREE_LOADSTORE
|
||||
#undef DO_MBED_LOCKFREE_EXCHG_OP
|
||||
#undef DO_MBED_LOCKFREE_CAS_WEAK_OP
|
||||
#undef DO_MBED_LOCKFREE_CAS_STRONG_OP
|
||||
#undef DO_MBED_LOCKFREE_2OP
|
||||
#undef DO_MBED_LOCKFREE_3OP
|
||||
#undef DO_MBED_LOCKFREE_NEWVAL_2OP
|
||||
#undef DO_MBED_LOCKFREE_OLDVAL_2OP
|
||||
#undef DO_MBED_LOCKFREE_OLDVAL_3OP
|
||||
#undef DO_MBED_LOCKFREE_EXCHG_OPS
|
||||
#undef DO_MBED_LOCKFREE_2OPS
|
||||
#undef DO_MBED_LOCKFREE_3OPS
|
||||
#undef DO_MBED_LOCKFREE_NEWVAL_2OPS
|
||||
#undef DO_MBED_LOCKFREE_OLDVAL_2OPS
|
||||
#undef DO_MBED_LOCKFREE_OLDVAL_3OPS
|
||||
#undef DO_MBED_LOCKFREE_CAS_WEAK_OPS
|
||||
#undef DO_MBED_LOCKFREE_CAS_STRONG_OPS
|
||||
#undef DO_MBED_SIGNED_CAS_OP
|
||||
|
|
|
|||
Loading…
Reference in New Issue