diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct
index a240540462..8f5c974de0 100644
--- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct
+++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct
@@ -29,17 +29,20 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
   ; 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8
   ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
   RW_IRAM1 0x100000C8 0x7F18-Stack_Size  {
-   .ANY (+RW +ZI)
+   .ANY1 (+RW +ZI)
   }
   ARM_LIB_STACK (0x100000C8+0x7F18) EMPTY -Stack_Size { ; stack
   }
   RW_IRAM2 0x2007C000 0x4000  {  ; RW data, ETH RAM
    .ANY (AHBSRAM0)
+   .ANY2 (+RW +ZI)
   }
   RW_IRAM3 0x20080000 0x4000  {  ; RW data, ETH RAM
    .ANY (AHBSRAM1)
+   .ANY3 (+RW +ZI)
   }
   RW_IRAM4 0x40038000 0x0800  {  ; RW data, CAN RAM
    .ANY (CANRAM)
+   .ANY4 (+RW +ZI)
   }
 }