From 33c096c9d0c775fc8e7353f1981ed008e804225b Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Wed, 31 Jul 2013 10:19:18 +0200
Subject: [PATCH 1/8] Initial version of a ld and a startup for KL25Z ARM GCC

---
 .../TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld | 159 ++++++++++++
 .../TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s       | 235 ++++++++++++++++++
 2 files changed, 394 insertions(+)
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
new file mode 100644
index 0000000000..9c1894cdea
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
@@ -0,0 +1,159 @@
+MEMORY
+{
+  VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x000003FE
+  FLASHCFG (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
+  FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x410
+  RAM (rwx) : ORIGIN = 0x1FFFF000, LENGTH = 16K
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * _reset_init : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .isr_vector :
+    {
+        __vector_table = .;
+        . = ALIGN(4);
+        KEEP(*(.isr_vector))
+        *(.text.SystemInit)
+        . = ALIGN(4);
+    } > VECTORS
+
+    .cfmprotect :
+    {
+        . = ALIGN(4);
+        KEEP(*(.cfmprotect))
+    } > FLASHCFG
+
+    .text :
+    {
+        *(.text*)
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+
+        KEEP(*(.eh_frame*))
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    __etext = .;
+
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        . = ALIGN(4);
+        /* All data end */
+        __data_end__ = .;
+
+    } > RAM
+
+    .bss :
+    {
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        __bss_end__ = .;
+    } > RAM
+
+    .heap :
+    {
+        __end__ = .;
+        end = __end__;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy :
+    {
+        *(.stack)
+    } > RAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
new file mode 100644
index 0000000000..af1cbaea73
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
@@ -0,0 +1,235 @@
+/* File: startup_ARMCM0.S
+ * Purpose: startup file for Cortex-M0 devices. Should use with
+ *   GCC for ARM Embedded Processors
+ * Version: V1.2
+ * Date: 15 Nov 2011
+ *
+ * Copyright (c) 2011, ARM Limited
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    * Neither the name of the ARM Limited nor the
+      names of its contributors may be used to endorse or promote products
+      derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+    .syntax unified
+    .arch armv6-m
+
+/* Memory Model
+   The HEAP starts at the end of the DATA section and grows upward.
+
+   The STACK starts at the end of the RAM and grows downward.
+
+   The HEAP and stack STACK are only checked at compile time:
+   (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
+
+   This is just a check for the bare minimum for the Heap+Stack area before
+   aborting compilation, it is not the run time limit:
+   Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
+ */
+    .section .stack
+    .align 3
+#ifdef __STACK_SIZE
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .equ    Stack_Size, 0x80
+#endif
+    .globl    __StackTop
+    .globl    __StackLimit
+__StackLimit:
+    .space    Stack_Size
+    .size __StackLimit, . - __StackLimit
+__StackTop:
+    .size __StackTop, . - __StackTop
+
+    .section .heap
+    .align 3
+#ifdef __HEAP_SIZE
+    .equ    Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 0x80
+#endif
+    .globl    __HeapBase
+    .globl    __HeapLimit
+__HeapBase:
+    .space    Heap_Size
+    .size __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size __HeapLimit, . - __HeapLimit
+
+    .section .isr_vector
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long    __StackTop            /* Top of Stack */
+    .long    Reset_Handler         /* Reset Handler */
+    .long    NMI_Handler           /* NMI Handler */
+    .long    HardFault_Handler     /* Hard Fault Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    SVC_Handler           /* SVCall Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    PendSV_Handler        /* PendSV Handler */
+    .long    SysTick_Handler       /* SysTick Handler */
+
+    /* External interrupts */
+    .long   DMA0_IRQHandler         /* DMA channel 0 transfer complete interrupt */
+    .long   DMA1_IRQHandler         /* DMA channel 1 transfer complete interrupt */
+    .long   DMA2_IRQHandler         /* DMA channel 2 transfer complete interrupt */
+    .long   DMA3_IRQHandler         /* DMA channel 3 transfer complete interrupt */
+    .long   Reserved20_IRQHandler   /* Reserved interrupt 20 */
+    .long   FTFA_IRQHandler         /* FTFA interrupt */
+    .long   LVD_LVW_IRQHandler      /* Low Voltage Detect, Low Voltage Warning */
+    .long   LLW_IRQHandler          /* Low Leakage Wakeup */
+    .long   I2C0_IRQHandler         /* I2C0 interrupt */
+    .long   I2C1_IRQHandler         /* I2C0 interrupt 25 */
+    .long   SPI0_IRQHandler         /* SPI0 interrupt */
+    .long   SPI1_IRQHandler         /* SPI1 interrupt */
+    .long   UART0_IRQHandler        /* UART0 status/error interrupt */
+    .long   UART1_IRQHandler        /* UART1 status/error interrupt */
+    .long   UART2_IRQHandler        /* UART2 status/error interrupt */
+    .long   ADC0_IRQHandler         /* ADC0 interrupt */
+    .long   CMP0_IRQHandler         /* CMP0 interrupt */
+    .long   TPM0_IRQHandler         /* TPM0 fault, overflow and channels interrupt */
+    .long   TPM1_IRQHandler         /* TPM1 fault, overflow and channels interrupt */
+    .long   TPM2_IRQHandler         /* TPM2 fault, overflow and channels interrupt */
+    .long   RTC_IRQHandler          /* RTC interrupt */
+    .long   RTC_Seconds_IRQHandler  /* RTC seconds interrupt */
+    .long   PIT_IRQHandler          /* PIT timer interrupt */
+    .long   Reserved39_IRQHandler   /* Reserved interrupt 39 */
+    .long   USB0_IRQHandler         /* USB0 interrupt */
+    .long   DAC0_IRQHandler         /* DAC interrupt */
+    .long   TSI0_IRQHandler         /* TSI0 interrupt */
+    .long   MCG_IRQHandler          /* MCG interrupt */
+    .long   LPTimer_IRQHandler      /* LPTimer interrupt */
+    .long   Reserved45_IRQHandler   /* Reserved interrupt 45 */
+    .long   PORTA_IRQHandler        /* Port A interrupt */
+    .long   PORTD_IRQHandler        /* Port D interrupt */
+
+    .size    __isr_vector, . - __isr_vector
+
+    .section .cfmprotect
+    .align 2
+    .globl kinetis_flash_config
+kinetis_flash_config:
+    .long 0xffffffff
+    .long 0xffffffff
+    .long 0xffffffff
+    .long 0xffffffff
+
+    .section .text
+    .thumb
+    .thumb_func
+    .align 2
+    .globl    Reset_Handler
+    .type    Reset_Handler, %function
+Reset_Handler:
+/*     Loop to copy data from read only memory to RAM. The ranges
+ *      of copy from/to are specified by following symbols evaluated in
+ *      linker script.
+ *      __etext: End of code section, i.e., begin of data sections to copy from.
+ *      __data_start__/__data_end__: RAM address range that data should be
+ *      copied to. Both must be aligned to 4 bytes boundary.  */
+
+    ldr    r1, =__etext
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+
+    subs    r3, r2
+    ble    .flash_to_ram_loop_end
+
+    movs    r4, 0
+.flash_to_ram_loop:
+    ldr    r0, [r1,r4]
+    str    r0, [r2,r4]
+    adds    r4, 4
+    cmp    r4, r3
+    blt    .flash_to_ram_loop
+.flash_to_ram_loop_end:
+
+    ldr    r0, =SystemInit
+    blx    r0
+    ldr    r0, =_start
+    bx    r0
+    .pool
+    .size Reset_Handler, . - Reset_Handler
+
+    .text
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro    def_default_handler    handler_name
+    .align 1
+    .thumb_func
+    .weak    \handler_name
+    .type    \handler_name, %function
+\handler_name :
+    b    .
+    .size    \handler_name, . - \handler_name
+    .endm
+
+    def_default_handler     NMI_Handler
+    def_default_handler     HardFault_Handler
+    def_default_handler     SVC_Handler
+    def_default_handler     PendSV_Handler
+    def_default_handler     SysTick_Handler
+    def_default_handler     DMA0_IRQHandler
+    def_default_handler     DMA1_IRQHandler
+    def_default_handler     DMA2_IRQHandler
+    def_default_handler     DMA3_IRQHandler
+    def_default_handler     Reserved20_IRQHandler
+    def_default_handler     FTFA_IRQHandler
+    def_default_handler     LVD_LVW_IRQHandler
+    def_default_handler     LLW_IRQHandler
+    def_default_handler     I2C0_IRQHandler
+    def_default_handler     I2C1_IRQHandler
+    def_default_handler     SPI0_IRQHandler
+    def_default_handler     SPI1_IRQHandler
+    def_default_handler     UART0_IRQHandler
+    def_default_handler     UART1_IRQHandler
+    def_default_handler     UART2_IRQHandler
+    def_default_handler     ADC0_IRQHandler
+    def_default_handler     CMP0_IRQHandler
+    def_default_handler     TPM0_IRQHandler
+    def_default_handler     TPM1_IRQHandler
+    def_default_handler     TPM2_IRQHandler
+    def_default_handler     RTC_IRQHandler
+    def_default_handler     RTC_Seconds_IRQHandler
+    def_default_handler     PIT_IRQHandler
+    def_default_handler     Reserved39_IRQHandler
+    def_default_handler     USB0_IRQHandler
+    def_default_handler     DAC0_IRQHandler
+    def_default_handler     TSI0_IRQHandler
+    def_default_handler     MCG_IRQHandler
+    def_default_handler     LPTimer_IRQHandler
+    def_default_handler     Reserved45_IRQHandler
+    def_default_handler     PORTA_IRQHandler
+    def_default_handler     PORTD_IRQHandler
+
+    .weak    DEF_IRQHandler
+    .set    DEF_IRQHandler, Default_Handler
+
+    .end

From afab75fd01474bc17dcd60eca82b2e6094c27a18 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Fri, 2 Aug 2013 07:14:36 +0200
Subject: [PATCH 2/8] only one flash memory (FLASH)

---
 .../TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld | 18 ++--
 .../TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s       | 22 +++--
 workspace_tools/targets.py                    | 92 +++++++++----------
 3 files changed, 65 insertions(+), 67 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
index 9c1894cdea..aa7c08edd0 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
@@ -1,8 +1,10 @@
+/*
+ * KL25Z ARM GCC linker script file
+ */
+
 MEMORY
 {
-  VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x000003FE
-  FLASHCFG (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
-  FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x410
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
   RAM (rwx) : ORIGIN = 0x1FFFF000, LENGTH = 16K
 }
 
@@ -41,15 +43,9 @@ SECTIONS
         __vector_table = .;
         . = ALIGN(4);
         KEEP(*(.isr_vector))
-        *(.text.SystemInit)
+         *(.text.SystemInit)
         . = ALIGN(4);
-    } > VECTORS
-
-    .cfmprotect :
-    {
-        . = ALIGN(4);
-        KEEP(*(.cfmprotect))
-    } > FLASHCFG
+    } > FLASH
 
     .text :
     {
diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
index af1cbaea73..b97e070e47 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
@@ -1,4 +1,4 @@
-/* File: startup_ARMCM0.S
+/* KL25Z startup ARM GCC
  * Purpose: startup file for Cortex-M0 devices. Should use with
  *   GCC for ARM Embedded Processors
  * Version: V1.2
@@ -131,15 +131,6 @@ __isr_vector:
 
     .size    __isr_vector, . - __isr_vector
 
-    .section .cfmprotect
-    .align 2
-    .globl kinetis_flash_config
-kinetis_flash_config:
-    .long 0xffffffff
-    .long 0xffffffff
-    .long 0xffffffff
-    .long 0xffffffff
-
     .section .text
     .thumb
     .thumb_func
@@ -232,4 +223,15 @@ Reset_Handler:
     .weak    DEF_IRQHandler
     .set    DEF_IRQHandler, Default_Handler
 
+/* Flash protection region, placed inside isr_vector section */
+    .section .isr_vector
+    .align 2
+    .org 0x400
+    .globl kinetis_flash_config
+kinetis_flash_config:
+    .long 0xffffffff
+    .long 0xffffffff
+    .long 0xffffffff
+    .long 0xffffffff
+
     .end
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index dd179c1d0b..f5946598e6 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -11,21 +11,21 @@ class Target:
     def __init__(self):
         # ARM Core
         self.core = None
-        
+
         # Is the disk provided by the interface chip of this board virtual?
         self.is_disk_virtual = False
-        
+
         # list of toolchains that are supported by the mbed SDK for this target
         self.supported_toolchains = None
-        
+
         # list of extra specific labels
         self.extra_labels = []
-        
+
         self.name = self.__class__.__name__
-    
+
     def program_cycle_s(self):
         return 4 if self.is_disk_virtual else 1.5
-    
+
     def get_labels(self):
         return [self.name, CORE_LABELS[self.core]] + self.extra_labels
 
@@ -33,33 +33,33 @@ class Target:
 class LPC2368(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "ARM7TDMI-S"
-        
+
         self.extra_labels = ['NXP', 'LPC23XX']
-        
+
         self.supported_toolchains = ["ARM"]
 
 
 class LPC1768(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M3"
-        
+
         self.extra_labels = ['NXP', 'LPC176X']
-        
+
         self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
 
 
 class LPC11U24(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M0"
-        
+
         self.extra_labels = ['NXP', 'LPC11UXX']
-        
+
         self.supported_toolchains = ["ARM", "uARM"]
 
 
@@ -68,7 +68,7 @@ class KL05Z(Target):
         Target.__init__(self)
 
         self.core = "Cortex-M0+"
-        
+
         self.extra_labels = ['Freescale']
 
         self.supported_toolchains = ["ARM"]
@@ -79,100 +79,100 @@ class KL05Z(Target):
 class KL25Z(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M0+"
-        
+
         self.extra_labels = ['Freescale']
-        
-        self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB"]
-        
+
+        self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM"]
+
         self.is_disk_virtual = True
 
 
 class LPC812(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M0+"
-        
+
         self.extra_labels = ['NXP', 'LPC81X']
-        
+
         self.supported_toolchains = ["uARM"]
-        
+
         self.is_disk_virtual = True
 
 
 class LPC4088(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M4"
-        
+
         self.extra_labels = ['NXP', 'LPC408X']
-        
+
         self.supported_toolchains = ["ARM", "GCC_CR"]
 
 
 class LPC4330_M4(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M4"
-        
+
         self.extra_labels = ['NXP', 'LPC43XX']
-        
+
         self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
 
 
 class LPC4330_M0(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M0"
-        
+
         self.extra_labels = ['NXP', 'LPC43XX']
-        
+
         self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
 
 class LPC1800(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M3"
-        
+
         self.extra_labels = ['NXP', 'LPC43XX']
-        
+
         self.supported_toolchains = ["ARM", "GCC_CR", "IAR"]
 
 class STM32F407(Target):
     def __init__(self):
         Target.__init__(self)
-       
+
         self.core = "Cortex-M4"
-        
+
         self.extra_labels = ['STM', 'STM32F4XX']
-        
+
         self.supported_toolchains = ["ARM", "GCC_ARM"]
 
 
 class MBED_MCU(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M0+"
-        
+
         self.extra_labels = ['ARM']
-        
+
         self.supported_toolchains = ["ARM"]
 
 class LPC1347(Target):
     def __init__(self):
         Target.__init__(self)
-        
+
         self.core = "Cortex-M3"
-        
+
         self.extra_labels = ['NXP', 'LPC13XX']
-        
+
         self.supported_toolchains = ["ARM", "GCC_ARM"]
 
 # Get a single instance for each target

From 48ee225d1f3dfd5bc1a32a94d0a83bc669903194 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Fri, 2 Aug 2013 18:01:49 +0200
Subject: [PATCH 3/8] vectors and flash protection area are separated

---
 .../TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld | 20 +++++++++-----
 .../TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s       | 27 +++++++++----------
 2 files changed, 27 insertions(+), 20 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
index aa7c08edd0..f0251aa9b5 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
@@ -4,7 +4,9 @@
 
 MEMORY
 {
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
+  VECTORS	(rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
+  FLASH_PROTECTION	(rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
+  FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x00000410
   RAM (rwx) : ORIGIN = 0x1FFFF000, LENGTH = 16K
 }
 
@@ -41,11 +43,17 @@ SECTIONS
     .isr_vector :
     {
         __vector_table = .;
-        . = ALIGN(4);
-        KEEP(*(.isr_vector))
-         *(.text.SystemInit)
-        . = ALIGN(4);
-    } > FLASH
+        KEEP(*(.vector_table))
+        *(.text.Reset_Handler)
+        *(.text.System_Init)
+         . = ALIGN(4);
+    } > VECTORS
+
+    .flash_protect :
+    {
+        KEEP(*(.kinetis_flash_config_field))
+         . = ALIGN(4);
+    } > FLASH_PROTECTION
 
     .text :
     {
diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
index b97e070e47..02998d808f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/startup_MKL25Z4.s
@@ -74,7 +74,7 @@ __HeapBase:
 __HeapLimit:
     .size __HeapLimit, . - __HeapLimit
 
-    .section .isr_vector
+    .section .vector_table,"a",%progbits
     .align 2
     .globl __isr_vector
 __isr_vector:
@@ -100,7 +100,7 @@ __isr_vector:
     .long   DMA1_IRQHandler         /* DMA channel 1 transfer complete interrupt */
     .long   DMA2_IRQHandler         /* DMA channel 2 transfer complete interrupt */
     .long   DMA3_IRQHandler         /* DMA channel 3 transfer complete interrupt */
-    .long   Reserved20_IRQHandler   /* Reserved interrupt 20 */
+    .long   Default_Handler         /* Reserved interrupt 20 */
     .long   FTFA_IRQHandler         /* FTFA interrupt */
     .long   LVD_LVW_IRQHandler      /* Low Voltage Detect, Low Voltage Warning */
     .long   LLW_IRQHandler          /* Low Leakage Wakeup */
@@ -119,19 +119,19 @@ __isr_vector:
     .long   RTC_IRQHandler          /* RTC interrupt */
     .long   RTC_Seconds_IRQHandler  /* RTC seconds interrupt */
     .long   PIT_IRQHandler          /* PIT timer interrupt */
-    .long   Reserved39_IRQHandler   /* Reserved interrupt 39 */
+    .long   Default_Handler         /* Reserved interrupt 39 */
     .long   USB0_IRQHandler         /* USB0 interrupt */
     .long   DAC0_IRQHandler         /* DAC interrupt */
     .long   TSI0_IRQHandler         /* TSI0 interrupt */
     .long   MCG_IRQHandler          /* MCG interrupt */
     .long   LPTimer_IRQHandler      /* LPTimer interrupt */
-    .long   Reserved45_IRQHandler   /* Reserved interrupt 45 */
+    .long   Default_Handler         /* Reserved interrupt 45 */
     .long   PORTA_IRQHandler        /* Port A interrupt */
     .long   PORTD_IRQHandler        /* Port D interrupt */
 
     .size    __isr_vector, . - __isr_vector
 
-    .section .text
+    .section .text.Reset_Handler
     .thumb
     .thumb_func
     .align 2
@@ -187,11 +187,12 @@ Reset_Handler:
     def_default_handler     SVC_Handler
     def_default_handler     PendSV_Handler
     def_default_handler     SysTick_Handler
+    def_default_handler     Default_Handler
+
     def_default_handler     DMA0_IRQHandler
     def_default_handler     DMA1_IRQHandler
     def_default_handler     DMA2_IRQHandler
     def_default_handler     DMA3_IRQHandler
-    def_default_handler     Reserved20_IRQHandler
     def_default_handler     FTFA_IRQHandler
     def_default_handler     LVD_LVW_IRQHandler
     def_default_handler     LLW_IRQHandler
@@ -210,28 +211,26 @@ Reset_Handler:
     def_default_handler     RTC_IRQHandler
     def_default_handler     RTC_Seconds_IRQHandler
     def_default_handler     PIT_IRQHandler
-    def_default_handler     Reserved39_IRQHandler
     def_default_handler     USB0_IRQHandler
     def_default_handler     DAC0_IRQHandler
     def_default_handler     TSI0_IRQHandler
     def_default_handler     MCG_IRQHandler
     def_default_handler     LPTimer_IRQHandler
-    def_default_handler     Reserved45_IRQHandler
     def_default_handler     PORTA_IRQHandler
     def_default_handler     PORTD_IRQHandler
 
-    .weak    DEF_IRQHandler
+    .weak   DEF_IRQHandler
     .set    DEF_IRQHandler, Default_Handler
 
-/* Flash protection region, placed inside isr_vector section */
-    .section .isr_vector
+/* Flash protection region, placed at 0x400 */
+    .text
+    .thumb
     .align 2
-    .org 0x400
-    .globl kinetis_flash_config
+    .section .kinetis_flash_config_field,"a",%progbits
 kinetis_flash_config:
     .long 0xffffffff
     .long 0xffffffff
     .long 0xffffffff
-    .long 0xffffffff
+    .long 0xfffffffe
 
     .end

From 0d6bec9d8c74d3005e6899eb923f821946963ee9 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Fri, 2 Aug 2013 21:08:29 +0200
Subject: [PATCH 4/8] LD - space reserved for vectors in RAM

---
 .../TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld  | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
index f0251aa9b5..ac2b84eedc 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
@@ -98,6 +98,8 @@ SECTIONS
     .data : AT (__etext)
     {
         __data_start__ = .;
+        /* vectors come here, shift 0xc0 */
+        . = . + 0xC0;
         *(vtable)
         *(.data*)
 

From 08beebcd83b1473f252d7a6ba7ea3bc4b8066f71 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Fri, 2 Aug 2013 22:32:41 +0200
Subject: [PATCH 5/8] RAM region shifted by 0xC0 for vectors

---
 .../TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld               | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
index ac2b84eedc..6c8da015b9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
@@ -4,10 +4,10 @@
 
 MEMORY
 {
-  VECTORS	(rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
+  VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
   FLASH_PROTECTION	(rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
   FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 128K - 0x00000410
-  RAM (rwx) : ORIGIN = 0x1FFFF000, LENGTH = 16K
+  RAM (rwx) : ORIGIN = 0x1FFFF0C0, LENGTH = 16K - 0xC0
 }
 
 /* Linker script to place sections and symbol values. Should be used together
@@ -98,8 +98,6 @@ SECTIONS
     .data : AT (__etext)
     {
         __data_start__ = .;
-        /* vectors come here, shift 0xc0 */
-        . = . + 0xC0;
         *(vtable)
         *(.data*)
 

From 3c0775f5c3e699818edd12bb05aac453d13eadb8 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Sun, 4 Aug 2013 21:33:06 +0200
Subject: [PATCH 6/8] More pin mux options for KL25Z

  - as reported in mbed bug section, add all available mux options
---
 .../TARGET_KL25Z/analogin_api.c               |  2 +
 .../TARGET_Freescale/TARGET_KL25Z/i2c_api.c   | 59 ++++++++++---------
 .../TARGET_KL25Z/serial_api.c                 | 54 +++++++++--------
 .../TARGET_Freescale/TARGET_KL25Z/spi_api.c   | 38 ++++++++----
 4 files changed, 92 insertions(+), 61 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
index 6b37449698..208a70b936 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
@@ -21,7 +21,9 @@
 
 static const PinMap PinMap_ADC[] = {
     {PTE20, ADC0_SE0,  0},
+    {PTE21, ADC0_SE4a, 0},
     {PTE22, ADC0_SE3,  0},
+    {PTE23, ADC0_SE7a, 0},
     {PTE29, ADC0_SE4b, 0},
     {PTE30, ADC0_SE23, 0},
     {PTB0,  ADC0_SE8,  0},
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
index fc526ed011..f60f778b68 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
@@ -25,6 +25,9 @@ static const PinMap PinMap_I2C_SDA[] = {
     {PTE0,  I2C_1, 6},
     {PTB1,  I2C_0, 2},
     {PTB3,  I2C_0, 2},
+    {PTC11, I2C_1, 2},
+    {PTC2,  I2C_1, 2},
+    {PTA4,  I2C_1, 2},
     {NC  ,  NC   , 0}
 };
 
@@ -34,6 +37,8 @@ static const PinMap PinMap_I2C_SCL[] = {
     {PTE1,  I2C_1, 6},
     {PTB0,  I2C_0, 2},
     {PTB2,  I2C_0, 2},
+    {PTC10, I2C_1, 2},
+    {PTC1,  I2C_1, 2},
     {NC  ,  NC,    0}
 };
 
@@ -79,7 +84,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
 
     pinmap_pinout(sda, PinMap_I2C_SDA);
     pinmap_pinout(scl, PinMap_I2C_SCL);
-    
+
     first_read = 1;
 }
 
@@ -112,12 +117,12 @@ int i2c_stop(i2c_t *obj) {
 
 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
     uint32_t i, timeout = 1000;
-    
+
     for (i = 0; i < timeout; i++) {
         if (obj->i2c->S & mask)
             return 0;
     }
-    
+
     return 1;
 }
 
@@ -126,14 +131,14 @@ static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
 //    1: OK ack not received
 //    2: failure
 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
-    
+
     // wait for the interrupt flag
     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
         return 2;
     }
-    
+
     obj->i2c->S |= I2C_S_IICIF_MASK;
-    
+
     // wait transfer complete
     if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
         return 2;
@@ -151,9 +156,9 @@ static int i2c_wait_end_rx_transfer(i2c_t *obj) {
     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
         return 1;
     }
-    
+
     obj->i2c->S |= I2C_S_IICIF_MASK;
-    
+
     return 0;
 }
 
@@ -288,33 +293,33 @@ void i2c_reset(i2c_t *obj) {
 
 int i2c_byte_read(i2c_t *obj, int last) {
     char data;
-    
+
     // set rx mode
     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
-    
+
     if(first_read) {
         // first dummy read
         i2c_do_read(obj, &data, 0);
         first_read = 0;
     }
-    
+
     if (last) {
         // set tx mode
         obj->i2c->C1 |= I2C_C1_TX_MASK;
         return obj->i2c->D;
     }
-        
+
     i2c_do_read(obj, &data, last);
-    
+
     return data;
 }
 
 int i2c_byte_write(i2c_t *obj, int data) {
     first_read = 1;
-    
+
     // set tx mode
     obj->i2c->C1 |= I2C_C1_TX_MASK;
-    
+
     return !i2c_do_write(obj, (data & 0xFF));
 }
 
@@ -335,10 +340,10 @@ int i2c_slave_receive(i2c_t *obj) {
     switch(obj->i2c->S) {
         // read addressed
         case 0xE6: return 1;
-        
+
         // write addressed
         case 0xE2: return 3;
-        
+
         default: return 0;
     }
 }
@@ -346,22 +351,22 @@ int i2c_slave_receive(i2c_t *obj) {
 int i2c_slave_read(i2c_t *obj, char *data, int length) {
     uint8_t dummy_read, count;
     uint8_t * ptr;
-    
+
     // set rx mode
     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
-    
+
     // first dummy read
     dummy_read = obj->i2c->D;
     if(i2c_wait_end_rx_transfer(obj)) {
         return 0;
     }
-    
+
     // read address
     dummy_read = obj->i2c->D;
     if(i2c_wait_end_rx_transfer(obj)) {
         return 0;
     }
-    
+
     // read (length - 1) bytes
     for (count = 0; count < (length - 1); count++) {
         data[count] = obj->i2c->D;
@@ -373,32 +378,32 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) {
     // read last byte
     ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
     *ptr = obj->i2c->D;
-    
+
     return (length) ? (count + 1) : 0;
 }
 
 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
     uint32_t i, count = 0;
-    
+
     // set tx mode
     obj->i2c->C1 |= I2C_C1_TX_MASK;
-    
+
     for (i = 0; i < length; i++) {
         if(i2c_do_write(obj, data[count++]) == 2) {
             return i;
         }
     }
-    
+
     // set rx mode
     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
-    
+
     // dummy rx transfer needed
     // otherwise the master cannot generate a stop bit
     obj->i2c->D;
     if(i2c_wait_end_rx_transfer(obj) == 2) {
         return count;
     }
-    
+
     return count;
 }
 
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
index f20361bec3..8c202d5d8e 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
@@ -28,19 +28,27 @@
  * INITIALIZATION
  ******************************************************************************/
 static const PinMap PinMap_UART_TX[] = {
-    {PTC4, UART_1, 3},
-    {PTA2, UART_0, 2},
-    {PTD5, UART_2, 3},
-    {PTD3, UART_2, 3},
-    {NC  , NC    , 0}
+    {PTC4,  UART_1, 3},
+    {PTA2,  UART_0, 2},
+    {PTD5,  UART_2, 3},
+    {PTD3,  UART_2, 3},
+    {PTD7,  UART_0, 3},
+    {PTE20, UART_0, 4},
+    {PTE22, UART_2, 4},
+    {PTE0,  UART_1, 3},
+    {NC  ,  NC    , 0}
 };
 
 static const PinMap PinMap_UART_RX[] = {
-    {PTC3, UART_1, 3},
-    {PTA1, UART_0, 2},
-    {PTD4, UART_2, 3},
-    {PTD2, UART_2, 3},
-    {NC  , NC    , 0}
+    {PTC3,  UART_1, 3},
+    {PTA1,  UART_0, 2},
+    {PTD4,  UART_2, 3},
+    {PTD2,  UART_2, 3},
+    {PTD6,  UART_0, 3},
+    {PTE23, UART_2, 4},
+    {PTE21, UART_0, 4},
+    {PTE1,  UART_1, 3},
+    {NC  ,  NC    , 0}
 };
 
 #define UART_NUM    3
@@ -69,7 +77,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     }
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
-    
+
     switch (uart) {
         case UART_0: obj->index = 0; break;
         case UART_1: obj->index = 1; break;
@@ -114,13 +122,13 @@ void serial_free(serial_t *obj) {
 //     DivAddVal < MulVal
 //
 void serial_baud(serial_t *obj, int baudrate) {
-    
+
     // save C2 state
     uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
-    
+
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
-    
+
     // [TODO] not hardcode this value
     uint32_t PCLK = (obj->uart == UART0) ? 48000000u : 24000000u;
 
@@ -135,20 +143,20 @@ void serial_baud(serial_t *obj, int baudrate) {
     // set BDH and BDL
     obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
     obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
-    
+
     // restore C2 state
     obj->uart->C2 |= c2_state;
 }
 
 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
     uint8_t m10 = 0;
-    
+
     // save C2 state
     uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
-    
+
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
-    
+
     // 8 data bits = 0 ... 9 data bits = 1
     if ((data_bits < 8) || (data_bits > 9)) {
         error("Invalid number of bits (%d) in serial format, should be 8..9\r\n", data_bits);
@@ -170,7 +178,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
         error("Invalid stop bits specified\r\n");
     }
     stop_bits -= 1;
-    
+
     // 9 data bits + parity
     if (data_bits == 2) {
         // only uart0 supports 10 bit communication
@@ -185,17 +193,17 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
     obj->uart->C1 = ((data_bits << 4)
                   |  (parity_enable << 1)
                   |  (parity_select << 0));
-    
+
     // enable 10bit mode if needed
     if (obj->index == 0) {
         obj->uart->C4 &= ~UARTLP_C4_M10_MASK;
         obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT);
     }
-    
+
     // stop bits
     obj->uart->BDH &= ~UART_BDH_SBNS_MASK;
     obj->uart->BDH |= (stop_bits << UART_BDH_SBNS_SHIFT);
-    
+
     // restore C2 state
     obj->uart->C2 |= c2_state;
 }
@@ -296,7 +304,7 @@ void serial_pinout_tx(PinName tx) {
 }
 
 void serial_break_set(serial_t *obj) {
-    obj->uart->C2 |= UART_C2_SBK_MASK; 
+    obj->uart->C2 |= UART_C2_SBK_MASK;
 }
 
 void serial_break_clear(serial_t *obj) {
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
index c38e1798e5..42a0e2d595 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
@@ -22,31 +22,47 @@
 #include "error.h"
 
 static const PinMap PinMap_SPI_SCLK[] = {
-    {PTE2, SPI_1, 2},
-    {PTC5, SPI_0, 2},
-    {PTD1, SPI_0, 2},
-    {NC  , NC   , 0}
+    {PTE2,  SPI_1, 2},
+    {PTC5,  SPI_0, 2},
+    {PTD1,  SPI_0, 2},
+    {PTB11, SPI_1, 2},
+    {PTD5,  SPI_1, 2},
+    {NC  ,  NC   , 0}
 };
 
 static const PinMap PinMap_SPI_MOSI[] = {
     {PTE1, SPI_1, 2},
     {PTC6, SPI_0, 2},
     {PTD2, SPI_0, 2},
+    {PTE3, SPI_1, 2},
+    {PTD7, SPI_1, 5},
+    {PTC7, SPI_0, 5},
+    {PTD3, SPI_0, 5},
+    {PTD6, SPI_1, 2},
     {NC  , NC   , 0}
 };
 
 static const PinMap PinMap_SPI_MISO[] = {
-    {PTE3, SPI_1, 2},
-    {PTC7, SPI_0, 2},
-    {PTD3, SPI_0, 2},
+    {PTE3,  SPI_1, 2},
+    {PTC7,  SPI_0, 2},
+    {PTD3,  SPI_0, 2},
+    {PTE1,  SPI_1, 5},
+    {PTA16, SPI_0, 5},
+    {PTA17, SPI_0, 5},
+    {PTC5,  SPI_0, 5},
+    {PTD2,  SPI_0, 5},
+    {PTD6,  SPI_1, 5},
+    {PTD7,  SPI_1, 2},
     {NC   , NC   , 0}
 };
 
 static const PinMap PinMap_SPI_SSEL[] = {
-    {PTE4, SPI_1, 2},
-    {PTC4, SPI_0, 2},
-    {PTD0, SPI_0, 2},
-    {NC  , NC   , 0}
+    {PTE4,  SPI_1, 2},
+    {PTC4,  SPI_0, 2},
+    {PTD0,  SPI_0, 2},
+    {PTB10, SPI_1, 2},
+    {PTD4,  SPI_1, 2},
+    {NC  ,  NC   , 0}
 };
 
 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {

From e1af24c1f28fb0e337cfaf70adc60578bf9d0f47 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Mon, 5 Aug 2013 19:06:22 +0200
Subject: [PATCH 7/8] Spaces correction

---
 .../TARGET_Freescale/TARGET_KL25Z/i2c_api.c   | 54 +++++++++----------
 .../TARGET_KL25Z/serial_api.c                 | 26 ++++-----
 2 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
index f60f778b68..6b051ca75b 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
@@ -84,7 +84,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
 
     pinmap_pinout(sda, PinMap_I2C_SDA);
     pinmap_pinout(scl, PinMap_I2C_SCL);
-
+    
     first_read = 1;
 }
 
@@ -117,12 +117,12 @@ int i2c_stop(i2c_t *obj) {
 
 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
     uint32_t i, timeout = 1000;
-
+    
     for (i = 0; i < timeout; i++) {
         if (obj->i2c->S & mask)
             return 0;
     }
-
+    
     return 1;
 }
 
@@ -131,14 +131,14 @@ static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
 //    1: OK ack not received
 //    2: failure
 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
-
+    
     // wait for the interrupt flag
     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
         return 2;
     }
-
+    
     obj->i2c->S |= I2C_S_IICIF_MASK;
-
+    
     // wait transfer complete
     if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
         return 2;
@@ -156,9 +156,9 @@ static int i2c_wait_end_rx_transfer(i2c_t *obj) {
     if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
         return 1;
     }
-
+    
     obj->i2c->S |= I2C_S_IICIF_MASK;
-
+    
     return 0;
 }
 
@@ -293,33 +293,33 @@ void i2c_reset(i2c_t *obj) {
 
 int i2c_byte_read(i2c_t *obj, int last) {
     char data;
-
+    
     // set rx mode
     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
-
+    
     if(first_read) {
         // first dummy read
         i2c_do_read(obj, &data, 0);
         first_read = 0;
     }
-
+    
     if (last) {
         // set tx mode
         obj->i2c->C1 |= I2C_C1_TX_MASK;
         return obj->i2c->D;
     }
-
+        
     i2c_do_read(obj, &data, last);
-
+    
     return data;
 }
 
 int i2c_byte_write(i2c_t *obj, int data) {
     first_read = 1;
-
+    
     // set tx mode
     obj->i2c->C1 |= I2C_C1_TX_MASK;
-
+    
     return !i2c_do_write(obj, (data & 0xFF));
 }
 
@@ -340,10 +340,10 @@ int i2c_slave_receive(i2c_t *obj) {
     switch(obj->i2c->S) {
         // read addressed
         case 0xE6: return 1;
-
+        
         // write addressed
         case 0xE2: return 3;
-
+        
         default: return 0;
     }
 }
@@ -351,22 +351,22 @@ int i2c_slave_receive(i2c_t *obj) {
 int i2c_slave_read(i2c_t *obj, char *data, int length) {
     uint8_t dummy_read, count;
     uint8_t * ptr;
-
+    
     // set rx mode
     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
-
+    
     // first dummy read
     dummy_read = obj->i2c->D;
     if(i2c_wait_end_rx_transfer(obj)) {
         return 0;
     }
-
+    
     // read address
     dummy_read = obj->i2c->D;
     if(i2c_wait_end_rx_transfer(obj)) {
         return 0;
     }
-
+    
     // read (length - 1) bytes
     for (count = 0; count < (length - 1); count++) {
         data[count] = obj->i2c->D;
@@ -378,32 +378,32 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) {
     // read last byte
     ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
     *ptr = obj->i2c->D;
-
+    
     return (length) ? (count + 1) : 0;
 }
 
 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
     uint32_t i, count = 0;
-
+    
     // set tx mode
     obj->i2c->C1 |= I2C_C1_TX_MASK;
-
+    
     for (i = 0; i < length; i++) {
         if(i2c_do_write(obj, data[count++]) == 2) {
             return i;
         }
     }
-
+    
     // set rx mode
     obj->i2c->C1 &= ~I2C_C1_TX_MASK;
-
+    
     // dummy rx transfer needed
     // otherwise the master cannot generate a stop bit
     obj->i2c->D;
     if(i2c_wait_end_rx_transfer(obj) == 2) {
         return count;
     }
-
+    
     return count;
 }
 
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
index 8c202d5d8e..0d360060be 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
@@ -77,7 +77,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     }
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
-
+    
     switch (uart) {
         case UART_0: obj->index = 0; break;
         case UART_1: obj->index = 1; break;
@@ -122,13 +122,13 @@ void serial_free(serial_t *obj) {
 //     DivAddVal < MulVal
 //
 void serial_baud(serial_t *obj, int baudrate) {
-
+    
     // save C2 state
     uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
-
+    
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
-
+    
     // [TODO] not hardcode this value
     uint32_t PCLK = (obj->uart == UART0) ? 48000000u : 24000000u;
 
@@ -143,20 +143,20 @@ void serial_baud(serial_t *obj, int baudrate) {
     // set BDH and BDL
     obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
     obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
-
+    
     // restore C2 state
     obj->uart->C2 |= c2_state;
 }
 
 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
     uint8_t m10 = 0;
-
+    
     // save C2 state
     uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
-
+    
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
-
+    
     // 8 data bits = 0 ... 9 data bits = 1
     if ((data_bits < 8) || (data_bits > 9)) {
         error("Invalid number of bits (%d) in serial format, should be 8..9\r\n", data_bits);
@@ -178,7 +178,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
         error("Invalid stop bits specified\r\n");
     }
     stop_bits -= 1;
-
+    
     // 9 data bits + parity
     if (data_bits == 2) {
         // only uart0 supports 10 bit communication
@@ -193,17 +193,17 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
     obj->uart->C1 = ((data_bits << 4)
                   |  (parity_enable << 1)
                   |  (parity_select << 0));
-
+    
     // enable 10bit mode if needed
     if (obj->index == 0) {
         obj->uart->C4 &= ~UARTLP_C4_M10_MASK;
         obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT);
     }
-
+    
     // stop bits
     obj->uart->BDH &= ~UART_BDH_SBNS_MASK;
     obj->uart->BDH |= (stop_bits << UART_BDH_SBNS_SHIFT);
-
+    
     // restore C2 state
     obj->uart->C2 |= c2_state;
 }
@@ -304,7 +304,7 @@ void serial_pinout_tx(PinName tx) {
 }
 
 void serial_break_set(serial_t *obj) {
-    obj->uart->C2 |= UART_C2_SBK_MASK;
+    obj->uart->C2 |= UART_C2_SBK_MASK; 
 }
 
 void serial_break_clear(serial_t *obj) {

From 4f03cd09b8990640ae9dfc4b0595f69a850bc602 Mon Sep 17 00:00:00 2001
From: emilmont <emilmont@gmail.com>
Date: Mon, 5 Aug 2013 22:09:32 +0100
Subject: [PATCH 8/8] Remove undefined peripherals

---
 .../targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c    | 2 --
 1 file changed, 2 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
index 208a70b936..6b37449698 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
@@ -21,9 +21,7 @@
 
 static const PinMap PinMap_ADC[] = {
     {PTE20, ADC0_SE0,  0},
-    {PTE21, ADC0_SE4a, 0},
     {PTE22, ADC0_SE3,  0},
-    {PTE23, ADC0_SE7a, 0},
     {PTE29, ADC0_SE4b, 0},
     {PTE30, ADC0_SE23, 0},
     {PTB0,  ADC0_SE8,  0},