diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c
index 970ba315d2..1d8db6d6a4 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c
@@ -1347,7 +1347,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
     /* Enable the TSVREFE channel*/
     ADC->CCR |= ADC_CCR_TSVREFE;
     
-    if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
+    if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
     {
       /* Delay for temperature sensor stabilization time */
       /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c
index 8ee57a424a..dcac1b0a74 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c
@@ -668,11 +668,11 @@ static uint8_t FLASH_OB_GetRDP(void)
 {
   uint8_t readstatus = OB_RDP_LEVEL_0;
 
-  if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
+  if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
   {
     readstatus = OB_RDP_LEVEL_2;
   }
-  else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
+  else if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)
   {
     readstatus = OB_RDP_LEVEL_1;
   }
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c
index aeaf896ab0..11dd8ee8f5 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c
@@ -338,8 +338,8 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
                                            uint16_t length,
                                            uint8_t do_ping) 
 {
-  if ((hhcd->hc[ch_num].ep_is_in != direction)) {
-    if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
+  if (hhcd->hc[ch_num].ep_is_in != direction) {
+    if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
       /*  reconfigure the endpoint !!! from tx -> rx, and rx ->tx  */
       USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
       if (direction)
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c
index b985ec2b48..5316a02284 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c
@@ -399,11 +399,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0)) 
     {
@@ -799,11 +799,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -1315,11 +1315,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -1804,11 +1804,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0)) 
     {
@@ -2640,11 +2640,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0)) 
     {
@@ -3393,11 +3393,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
@@ -3618,11 +3618,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c
index 961286e1a7..a7471ad61e 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c
@@ -389,11 +389,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
   
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -696,11 +696,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -1114,11 +1114,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {