From 5104f2d1cc77c8d680bbc48f594cd90464acb44b Mon Sep 17 00:00:00 2001 From: adustm Date: Fri, 12 Jan 2018 15:49:27 +0100 Subject: [PATCH] Improve SRAM use for IAR toolchain Use the entire SRAM2 with NVIC buffer + stack Increase HEAP size to 0x10000 in SRAM1 Increase the available SRAM1 by 0x2000 --- .../device/TOOLCHAIN_IAR/stm32l475xx.icf | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf index 15c4254b3f..84020a40d9 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf @@ -21,12 +21,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -/* Stack 1/8 and Heap 1/4 of RAM */ -define symbol __size_cstack__ = 0x8000; -define symbol __size_heap__ = 0xa000; +/* Stack complete SRAM2 and Heap 2/3 of SRAM1 */ +define symbol __size_cstack__ = 0x7e00; +define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; -define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; do not initialize { section .noinit }; @@ -34,5 +33,5 @@ do not initialize { section .noinit }; place at address mem:__intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; -place in SRAM1_region { readwrite, block STACKHEAP }; -place in SRAM2_region { }; +place in SRAM1_region { readwrite, block HEAP }; +place in SRAM2_region { block CSTACK };