diff --git a/hal/targets.json b/hal/targets.json index 116e4d193c..2b2cfbc442 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -1146,7 +1146,7 @@ "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F405RG"], "is_disk_virtual": true, - "macros": ["HSE_VALUE=26000000", "OS_CLOCK=48000000", "TRANSACTION_QUEUE_SIZE_SPI=2"], + "macros": ["HSE_VALUE=26000000", "TRANSACTION_QUEUE_SIZE_SPI=2"], "progen": {"target": "mts-mdot-f405rg"}, "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"], "release_versions": ["2"] @@ -1156,7 +1156,7 @@ "core": "Cortex-M4F", "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F411RE"], - "macros": ["HSE_VALUE=26000000", "OS_CLOCK=96000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"], + "macros": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000","TRANSACTION_QUEUE_SIZE_SPI=2"], "post_binary_hook": { "function": "MTSCode.combine_bins_mts_dot", "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"] diff --git a/hal/targets/cmsis/TARGET_ARM_SSG/mbed_rtx.h b/hal/targets/cmsis/TARGET_ARM_SSG/mbed_rtx.h new file mode 100644 index 0000000000..f88e05e44a --- /dev/null +++ b/hal/targets/cmsis/TARGET_ARM_SSG/mbed_rtx.h @@ -0,0 +1,37 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_BEETLE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 24000000 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_Freescale/mbed_rtx.h b/hal/targets/cmsis/TARGET_Freescale/mbed_rtx.h new file mode 100644 index 0000000000..c0943d5aa9 --- /dev/null +++ b/hal/targets/cmsis/TARGET_Freescale/mbed_rtx.h @@ -0,0 +1,192 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_K20D50M) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 96000000 +#endif + +#elif defined(TARGET_TEENSY3_1) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 96000000 +#endif + +#elif defined(TARGET_K22F) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20010000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 80000000 +#endif + +#elif defined(TARGET_K66F) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20030000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 120000000 +#endif + +#elif defined(TARGET_KL27Z) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20003000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_KL43Z) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20006000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_KL05Z) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20000C00UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_KL25Z) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20003000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_KL26Z) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20003000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_KL46Z) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20006000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_K64F) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20030000UL) +#endif + +#if defined(__CC_ARM) || defined(__GNUC__) +#define ISR_STACK_SIZE (0x1000) +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 120000000 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_Maxim/mbed_rtx.h b/hal/targets/cmsis/TARGET_Maxim/mbed_rtx.h new file mode 100644 index 0000000000..61a24f8b6d --- /dev/null +++ b/hal/targets/cmsis/TARGET_Maxim/mbed_rtx.h @@ -0,0 +1,67 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_MAX32600) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 24000000 +#endif + +#elif defined(TARGET_MAX32610) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 24000000 +#endif + +#elif defined(TARGET_MAX32620) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 96000000 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_NORDIC/mbed_rtx.h b/hal/targets/cmsis/TARGET_NORDIC/mbed_rtx.h new file mode 100644 index 0000000000..7041a37f61 --- /dev/null +++ b/hal/targets/cmsis/TARGET_NORDIC/mbed_rtx.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_MCU_NRF51822) + +#ifndef INITIAL_SP +# if defined(TARGET_MCU_NORDIC_32K) +# define INITIAL_SP (0x20008000UL) +# elif defined(TARGET_MCU_NORDIC_16K) +# define INITIAL_SP (0x20004000UL) +# endif +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 512 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32768 +#endif +#ifndef OS_SYSTICK +#define OS_SYSTICK 0 +#endif + +#elif defined(TARGET_MCU_NRF52832) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20010000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 512 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 64000000 +#endif + +#endif + +#endif diff --git a/hal/targets/cmsis/TARGET_NUVOTON/mbed_rtx.h b/hal/targets/cmsis/TARGET_NUVOTON/mbed_rtx.h new file mode 100644 index 0000000000..5cbc71ae0d --- /dev/null +++ b/hal/targets/cmsis/TARGET_NUVOTON/mbed_rtx.h @@ -0,0 +1,58 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_NUMAKER_PFM_NUC472) + +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 84000000 +#endif + +#if defined(__CC_ARM) + extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; + extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; + extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; + extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; + #define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base) + #define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length) + #define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) + #define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) +#elif defined(__GNUC__) + extern uint32_t __StackTop[]; + extern uint32_t __StackLimit[]; + extern uint32_t __end__[]; + extern uint32_t __HeapLimit[]; + #define HEAP_START ((unsigned char*)__end__) + #define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) + #define ISR_STACK_START ((unsigned char*)__StackLimit) + #define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) +#elif defined(__ICCARM__) + /* No region declarations needed */ +#else + #error "no toolchain defined" +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_NXP/mbed_rtx.h b/hal/targets/cmsis/TARGET_NXP/mbed_rtx.h new file mode 100644 index 0000000000..bb28e4684a --- /dev/null +++ b/hal/targets/cmsis/TARGET_NXP/mbed_rtx.h @@ -0,0 +1,208 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_LPC11U68) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_LPC11U24) \ + || defined(TARGET_LPC11U35_401) \ + || defined(TARGET_LPC11U35_501) \ + || defined(TARGET_LPCCAPPUCCINO) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_LPC1114) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10001000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_LPC1347) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_LPC1549) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x02009000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_LPC1768) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 96000000 +#endif + +#elif defined(TARGET_LPC2368) + +/* FIXME: INITIAL_SP is undefined for this target */ +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 96000000 +#endif +#ifndef OS_SCHEDULERSTKSIZE +#define OS_SCHEDULERSTKSIZE (136*2) +#endif + +#elif defined(TARGET_LPC2460) + +extern unsigned char __usr_stack_top__[]; +#ifndef INITIAL_SP +#define INITIAL_SP (__usr_stack_top__) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif +#ifndef OS_SCHEDULERSTKSIZE +#define OS_SCHEDULERSTKSIZE (136*2) +#endif + +#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10010000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 120000000 +#endif + +#elif defined(TARGET_LPC4330) || defined(TARGET_LPC4337) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10008000UL) +#endif +#define OS_TASKCNT 14 +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 204000000 +#endif + +#elif defined(TARGET_LPC812) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10001000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 36000000 +#endif + +#elif defined(TARGET_LPC824) || defined(TARGET_SSCI824) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x10002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 30000000 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_ONSEMI/mbed_rtx.h b/hal/targets/cmsis/TARGET_ONSEMI/mbed_rtx.h new file mode 100644 index 0000000000..897f313678 --- /dev/null +++ b/hal/targets/cmsis/TARGET_ONSEMI/mbed_rtx.h @@ -0,0 +1,37 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_NCS36510) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x40000000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_RENESAS/mbed_rtx.h b/hal/targets/cmsis/TARGET_RENESAS/mbed_rtx.h new file mode 100644 index 0000000000..61886067b1 --- /dev/null +++ b/hal/targets/cmsis/TARGET_RENESAS/mbed_rtx.h @@ -0,0 +1,25 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_RZ_A1H) || defined(TARGET_VK_RZ_A1H) +#ifndef OS_CLOCK +#define OS_CLOCK 12000000 +#endif +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_STM/mbed_rtx.h b/hal/targets/cmsis/TARGET_STM/mbed_rtx.h new file mode 100644 index 0000000000..52e20cea01 --- /dev/null +++ b/hal/targets/cmsis/TARGET_STM/mbed_rtx.h @@ -0,0 +1,697 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#if defined(TARGET_STM32F051R8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_STM32L031K6) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#elif defined(TARGET_STM32F070RB) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20004000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_STM32F072RB) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20004000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_STM32F091RC) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_STM32F100RB) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 24000000 +#endif + +#elif defined(TARGET_STM32F103RB) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20005000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F207ZG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 120000000 +#endif + +#elif defined(TARGET_STM32F303VC) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x2000A000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F334C8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20003000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F302R8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20004000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F303K8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20003000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 64000000 +#endif + +#elif defined(TARGET_STM32F303RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20010000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F303ZE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20010000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F334R8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20003000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 72000000 +#endif + +#elif defined(TARGET_STM32F446VE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 180000000 +#endif + +#elif defined(TARGET_STM32F401VC) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20010000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 84000000 +#endif + +#elif defined(TARGET_STM32F429ZI) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20030000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 168000000 +#endif + +#elif defined(TARGET_UBLOX_C029) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20030000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 512 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 168000000 +#endif + +#elif defined(TARGET_STM32F469NI) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20050000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 168000000 +#endif + +#elif defined(TARGET_STM32F411RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 100000000 +#endif + +#elif defined(TARGET_STM32F411RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 100000000 +#endif + +#elif defined(TARGET_STM32F405RG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 48000000 +#endif + +#elif defined(TARGET_STM32F411RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 96000000 +#endif + +#elif defined(TARGET_STM32F401RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20018000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 84000000 +#endif + +#elif defined(TARGET_STM32F410RB) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 100000000 +#endif + +#elif defined(TARGET_STM32F411RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 100000000 +#endif + +#elif defined(TARGET_STM32F429ZI) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20030000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 168000000 +#endif + +#elif defined(TARGET_STM32F446RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 180000000 +#endif + +#elif defined(TARGET_STM32F446ZE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 180000000 +#endif + +#elif defined(TARGET_STM32F407VG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 168000000 +#endif + +#elif defined(TARGET_STM32F746NG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20050000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 216000000 +#endif + +#elif defined(TARGET_STM32F746ZG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20050000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 216000000 +#endif + +#elif defined(TARGET_STM32F767ZI) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20080000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 216000000 +#endif + +#elif defined(TARGET_STM32F769NI) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20080000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 216000000 +#endif + +#elif defined(TARGET_STM32L053C8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#elif defined(TARGET_STM32L031K6) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#elif defined(TARGET_STM32L053R8) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#elif defined(TARGET_STM32L073RZ) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20005000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#elif defined(TARGET_STM32L152RC) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 24000000 +#endif + +#elif defined(TARGET_STM32L152RE) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20014000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 24000000 +#endif + +#elif defined(TARGET_NZ32_SC151) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 32000000 +#endif + +#elif defined(TARGET_STM32L476VG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20018000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 80000000 +#endif + +#elif defined(TARGET_STM32L432KC) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x2000C000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 80000000 +#endif + +#elif defined(TARGET_STM32L476RG) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20018000UL) +#endif +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif +#ifndef OS_CLOCK +#define OS_CLOCK 80000000 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/hal/targets/cmsis/TARGET_Silicon_Labs/mbed_rtx.h b/hal/targets/cmsis/TARGET_Silicon_Labs/mbed_rtx.h new file mode 100644 index 0000000000..78a3547aad --- /dev/null +++ b/hal/targets/cmsis/TARGET_Silicon_Labs/mbed_rtx.h @@ -0,0 +1,93 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_MBED_RTX_H +#define MBED_MBED_RTX_H + +#include "clocking.h" + +#ifndef OS_CLOCK +#define OS_CLOCK REFERENCE_FREQUENCY +#endif + +#if defined(TARGET_EFM32GG_STK3700) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20020000UL) +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 256 +#endif + +#elif defined(TARGET_EFM32HG_STK3400) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20002000UL) +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 6 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 112 +#endif + +#elif defined(TARGET_EFM32LG_STK3600) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif + +#elif defined(TARGET_EFM32PG_STK3401) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif + +#elif defined(TARGET_EFM32WG_STK3800) + +#ifndef INITIAL_SP +#define INITIAL_SP (0x20008000UL) +#endif + +#ifndef OS_TASKCNT +#define OS_TASKCNT 14 +#endif +#ifndef OS_MAINSTKSIZE +#define OS_MAINSTKSIZE 128 +#endif + +#endif + +#endif // MBED_MBED_RTX_H diff --git a/rtos/rtx/TARGET_ARM7/RTX_CM_lib.h b/rtos/rtx/TARGET_ARM7/RTX_CM_lib.h index 10ba168055..3cde4b76d9 100755 --- a/rtos/rtx/TARGET_ARM7/RTX_CM_lib.h +++ b/rtos/rtx/TARGET_ARM7/RTX_CM_lib.h @@ -198,15 +198,8 @@ __attribute__((used)) void _mutex_release (OS_ID *mutex) { extern void pre_main (void); osThreadDef_t os_thread_def_main = {(os_pthread)pre_main, osPriorityNormal, 0, NULL}; -// This define should be probably moved to the CMSIS layer - -#if defined(TARGET_LPC2460) -extern unsigned char __usr_stack_top__[]; -#define INITIAL_SP (__usr_stack_top__) - -#else -#error "no target defined" - +#ifndef INITIAL_SP + #error "no target defined" #endif #ifdef __CC_ARM diff --git a/rtos/rtx/TARGET_ARM7/RTX_Conf_CM.c b/rtos/rtx/TARGET_ARM7/RTX_Conf_CM.c index 108d13844c..0e481f3d8e 100755 --- a/rtos/rtx/TARGET_ARM7/RTX_Conf_CM.c +++ b/rtos/rtx/TARGET_ARM7/RTX_Conf_CM.c @@ -39,6 +39,9 @@ * RTX User configuration part BEGIN *---------------------------------------------------------------------------*/ +// Include per-target RTX config file +#include "mbed_rtx.h" + //-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- // // Thread Configuration @@ -49,20 +52,12 @@ // counting "main", but not counting "osTimerThread" // Default: 6 #ifndef OS_TASKCNT -# if defined(TARGET_LPC2368) || defined(TARGET_LPC2460) -# define OS_TASKCNT 14 -# else -# error "no target defined" -# endif + #error "no target defined" #endif // Scheduler (+ interrupts) stack size [bytes] <64-4096:8><#/4> #ifndef OS_SCHEDULERSTKSIZE -# if defined(TARGET_LPC2368) || defined(TARGET_LPC2460) -# define OS_SCHEDULERSTKSIZE (136*2) -# else -# error "no target defined" -# endif + #error "no target defined" #endif // Idle stack size [bytes] <64-4096:8><#/4> @@ -101,15 +96,7 @@ // Defines the timer clock value. // Default: 6000000 (6MHz) #ifndef OS_CLOCK -# if defined(TARGET_LPC2368) -# define OS_CLOCK 96000000 - -# elif defined(TARGET_LPC2460) -# define OS_CLOCK 72000000 - -# else -# error "no target defined" -# endif + #error "no target defined" #endif // Timer tick value [us] <1-1000000> diff --git a/rtos/rtx/TARGET_CORTEX_A/RTX_Conf_CA.c b/rtos/rtx/TARGET_CORTEX_A/RTX_Conf_CA.c index 7ef9f6ca05..6423fdf7a3 100644 --- a/rtos/rtx/TARGET_CORTEX_A/RTX_Conf_CA.c +++ b/rtos/rtx/TARGET_CORTEX_A/RTX_Conf_CA.c @@ -43,6 +43,9 @@ #define OS_TIMERS 0 #endif +// Include per-target RTX config file +#include "mbed_rtx.h" + //-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- // // Thread Configuration @@ -122,11 +125,7 @@ // Defines the timer clock value. // Default: 12000000 (12MHz) #ifndef OS_CLOCK -# if defined(TARGET_RZ_A1H) || defined(TARGET_VK_RZ_A1H) - #define OS_CLOCK 12000000 -# else -# error "no target defined" -# endif + #error "no target defined" #endif // Timer tick value [us] <1-1000000> diff --git a/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h b/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h index f12a291a35..7d2d246c27 100644 --- a/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h +++ b/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h @@ -392,219 +392,6 @@ osThreadDef_t os_thread_def_main = {(os_pthread)pre_main, osPriorityNormal, 1U, * */ - -// This define should be probably moved to the CMSIS layer -#if defined(TARGET_LPC1768) -#define INITIAL_SP (0x10008000UL) - -#elif defined(TARGET_LPC11U24) -#define INITIAL_SP (0x10002000UL) - -#elif defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) -#define INITIAL_SP (0x10002000UL) - -#elif defined(TARGET_LPC1114) -#define INITIAL_SP (0x10001000UL) - -#elif defined(TARGET_LPC812) -#define INITIAL_SP (0x10001000UL) - -#elif defined(TARGET_LPC824) || defined(TARGET_SSCI824) -#define INITIAL_SP (0x10002000UL) - -#elif defined(TARGET_KL25Z) -#define INITIAL_SP (0x20003000UL) - -#elif defined(TARGET_KL26Z) -#define INITIAL_SP (0x20003000UL) - -#elif defined(TARGET_KL27Z) -#define INITIAL_SP (0x20003000UL) - -#elif defined(TARGET_K64F) -#define INITIAL_SP (0x20030000UL) - -#if defined(__CC_ARM) || defined(__GNUC__) -#define ISR_STACK_SIZE (0x1000) -#endif - -#elif defined(TARGET_K66F) -#define INITIAL_SP (0x20030000UL) - -#elif defined(TARGET_K22F) -#define INITIAL_SP (0x20010000UL) - -#elif defined(TARGET_KL46Z) -#define INITIAL_SP (0x20006000UL) - -#elif defined(TARGET_KL43Z) -#define INITIAL_SP (0x20006000UL) - -#elif defined(TARGET_KL05Z) -#define INITIAL_SP (0x20000C00UL) - -#elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) -#define INITIAL_SP (0x10010000UL) - -#elif defined(TARGET_LPC4330) -#define INITIAL_SP (0x10008000UL) - -#elif defined(TARGET_LPC4337) -#define INITIAL_SP (0x10008000UL) - -#elif defined(TARGET_LPC1347) -#define INITIAL_SP (0x10002000UL) - -#elif defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) -#define INITIAL_SP (0x20002000UL) - -#elif defined(TARGET_DISCO_F303VC) -#define INITIAL_SP (0x2000A000UL) - -#elif defined(TARGET_STM32F407) || defined(TARGET_STM32F407VG) -#define INITIAL_SP (0x20020000UL) - -#elif defined(TARGET_STM32F401RE) -#define INITIAL_SP (0x20018000UL) - -#elif defined(TARGET_LPC1549) -#define INITIAL_SP (0x02009000UL) - -#elif defined(TARGET_LPC11U68) -#define INITIAL_SP (0x10008000UL) - -#elif defined(TARGET_STM32F411RE) -#define INITIAL_SP (0x20020000UL) - -#elif defined(TARGET_STM32F207ZG) -#define INITIAL_SP (0x20020000UL) - -#elif defined(TARGET_STM32F410RB) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_STM32F103RB) || defined(TARGET_STM32L073RZ) -#define INITIAL_SP (0x20005000UL) - -#elif defined(TARGET_STM32F302R8) -#define INITIAL_SP (0x20004000UL) - -#elif defined(TARGET_STM32F334R8) -#define INITIAL_SP (0x20003000UL) - -#elif defined(TARGET_STM32F334C8) -#define INITIAL_SP (0x20003000UL) - -#elif defined(TARGET_STM32F405RG) -#define INITIAL_SP (0x20020000UL) - -#elif defined(TARGET_STM32F429ZI) || defined(TARGET_UBLOX_C029) -#define INITIAL_SP (0x20030000UL) - -#elif defined(TARGET_STM32F091RC) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_STM32F401VC) -#define INITIAL_SP (0x20010000UL) - -#elif defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303ZE) -#define INITIAL_SP (0x20010000UL) - -#elif defined(TARGET_STM32F303K8) -#define INITIAL_SP (0x20003000UL) - -#elif (defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG)) -#define INITIAL_SP (0x20050000UL) - -#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_MAX32620) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_TEENSY3_1) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_STM32L152RE) -#define INITIAL_SP (0x20014000UL) - -#elif defined(TARGET_NZ32_SC151) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_STM32F446RE) || defined(TARGET_STM32F446VE) || defined(TARGET_STM32F446ZE) -#define INITIAL_SP (0x20020000UL) - -#elif defined(TARGET_STM32F072RB) || defined(TARGET_STM32F070RB) -#define INITIAL_SP (0x20004000UL) - -#elif defined(TARGET_STM32L432KC) -#define INITIAL_SP (0x2000C000UL) - -#elif defined(TARGET_STM32L476VG) -#define INITIAL_SP (0x20018000UL) - -#elif defined(TARGET_STM32L476RG) -#define INITIAL_SP (0x20018000UL) - -#elif defined(TARGET_STM32F469NI) -#define INITIAL_SP (0x20050000UL) - -#elif defined(TARGET_STM32L152RC) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_EFM32GG_STK3700) || defined(TARGET_BEETLE) -#define INITIAL_SP (0x20020000UL) - -#elif defined(TARGET_EFM32HG_STK3400) -#define INITIAL_SP (0x20002000UL) - -#elif defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32WG_STK3800) || defined(TARGET_EFM32PG_STK3401) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_MCU_NORDIC_32K) -#define INITIAL_SP (0x20008000UL) - -#elif defined(TARGET_MCU_NORDIC_16K) -#define INITIAL_SP (0x20004000UL) - -#elif defined(TARGET_MCU_NRF52832) -#define INITIAL_SP (0x20010000UL) - -#elif (defined(TARGET_STM32F767ZI)) -#define INITIAL_SP (0x20080000UL) - -#elif (defined(TARGET_STM32F769NI)) -#define INITIAL_SP (0x20080000UL) - -#elif defined(TARGET_NUMAKER_PFM_NUC472) -# if defined(__CC_ARM) -extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; -extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; -#define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base) -#define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length) -#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) -#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) -# elif defined(__GNUC__) -extern uint32_t __StackTop[]; -extern uint32_t __StackLimit[]; -extern uint32_t __end__[]; -extern uint32_t __HeapLimit[]; -#define HEAP_START ((unsigned char*)__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) -#define ISR_STACK_START ((unsigned char*)__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) -# elif defined(__ICCARM__) -/* No region declarations needed */ -# else -#error "no toolchain defined" -# endif - -#elif defined(TARGET_NCS36510) -#define INITIAL_SP (0x40000000UL) - -#else -#error "no target defined" - -#endif - extern unsigned char *mbed_heap_start; extern uint32_t mbed_heap_size; @@ -641,6 +428,10 @@ uint32_t mbed_stack_isr_size = 0; #define ISR_STACK_SIZE ((uint32_t)__section_size("CSTACK")) #endif +#if !defined(INITIAL_SP) && !defined(HEAP_START) + #error "no target defined" +#endif + /* Define heap region if it has not been defined already */ #if !defined(HEAP_START) #if defined(__ICCARM__) diff --git a/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c b/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c index 99030216ab..e23e3e54a1 100755 --- a/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c +++ b/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c @@ -39,6 +39,9 @@ * RTX User configuration part BEGIN *---------------------------------------------------------------------------*/ +// Include per-target RTX config file +#include "mbed_rtx.h" + //-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- // // Thread Configuration @@ -48,24 +51,7 @@ // Defines max. number of user threads that will run at the same time. // Default: 6 #ifndef OS_TASKCNT -# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_K66F)|| defined(TARGET_STM32F401RE)\ - || defined(TARGET_STM32F410RB) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_STM32F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \ - || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F207ZG) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_MAX32620) || defined(TARGET_TEENSY3_1) \ - || defined(TARGET_STM32L152RE) || defined(TARGET_STM32F446RE) || defined(TARGET_STM32F446VE) || defined(TARGET_STM32F446ZE) || defined(TARGET_STM32L432KC) || defined(TARGET_STM32L476VG) || defined(TARGET_STM32L476RG) || defined(TARGET_STM32F469NI) || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) || defined(TARGET_STM32L152RC) \ - || defined(TARGET_EFM32GG_STK3700) || defined(TARGET_EFM32WG_STK3800) || defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32PG_STK3401) || defined(TARGET_STM32F767ZI) || defined(TARGET_STM32F769NI) \ - || defined(TARGET_NUMAKER_PFM_NUC472) || defined(TARGET_NCS36510) \ - || defined(TARGET_UBLOX_C029) -# define OS_TASKCNT 14 -# elif defined(TARGET_LPC11U24) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303ZE) || defined(TARGET_STM32F303K8) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \ - || defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL26Z) || defined(TARGET_KL27Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \ - || defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) \ - || defined(TARGET_STM32L073RZ) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) || defined(TARGET_NZ32_SC151) \ - || defined(TARGET_SSCI824) || defined(TARGET_STM32F070RB) \ - || defined(TARGET_EFM32HG_STK3400) || defined(TARGET_MCU_NRF51822) || defined(TARGET_BEETLE) || defined(TARGET_MCU_NRF52832) -# define OS_TASKCNT 6 -# else -# error "no target defined" -# endif + #error "no target defined" #endif #ifdef __MBED_CMSIS_RTOS_CM @@ -85,28 +71,7 @@ // Main Thread stack size [bytes] <64-32768:8><#/4> #ifndef OS_MAINSTKSIZE -# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_K66F) ||defined(TARGET_STM32F401RE)\ - || defined(TARGET_STM32F410RB) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_STM32F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \ - || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_MAX32620) || defined(TARGET_TEENSY3_1) \ - || defined(TARGET_STM32L152RE) || defined(TARGET_STM32F446RE) || defined(TARGET_STM32F446VE) || defined(TARGET_STM32F446ZE) || defined(TARGET_STM32L432KC) || defined(TARGET_STM32L476VG) || defined(TARGET_STM32L476RG) || defined(TARGET_STM32F469NI) || defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) || defined(TARGET_STM32L152RC) \ - ||defined(TARGET_EFM32GG_STK3700) || defined(TARGET_STM32F767ZI) || defined(TARGET_STM32F207ZG) || defined(TARGET_STM32F769NI) \ - || defined(TARGET_NUMAKER_PFM_NUC472) || defined(TARGET_NCS36510) -# define OS_MAINSTKSIZE 256 -# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \ - || defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL26Z) || defined(TARGET_KL27Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \ - || defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) || defined(TARGET_NZ32_SC151) \ - || defined(TARGET_SSCI824) || defined(TARGET_STM32F070RB) \ - || defined(TARGET_EFM32WG_STK3800) || defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32PG_STK3401) -# define OS_MAINSTKSIZE 128 -# elif defined(TARGET_STM32F334R8) || defined(TARGET_STM32F303RE)|| defined(TARGET_STM32F303ZE) || defined(TARGET_STM32F303K8) || defined(TARGET_STM32F334C8) \ - || defined(TARGET_STM32L073RZ) \ - || defined(TARGET_EFM32HG_STK3400) || defined(TARGET_BEETLE) -# define OS_MAINSTKSIZE 112 -# elif defined(TARGET_MCU_NRF51822) || defined(TARGET_MCU_NRF52832) || defined(TARGET_UBLOX_C029) -# define OS_MAINSTKSIZE 512 -# else -# error "no target defined" -# endif + #error "no target defined" #endif #ifndef __MBED_CMSIS_RTOS_CM @@ -159,11 +124,7 @@ // Cortex-M processors provide in most cases a SysTick timer that can be used as // as time-base for RTX. #ifndef OS_SYSTICK -# if defined(TARGET_MCU_NRF51822) -# define OS_SYSTICK 0 -# else -# define OS_SYSTICK 1 -# endif + #define OS_SYSTICK 1 #endif // // RTOS Kernel Timer input clock frequency [Hz] <1-1000000000> @@ -171,116 +132,7 @@ // When the Cortex-M SysTick timer is used, the input clock // is on most systems identical with the core clock. #ifndef OS_CLOCK -# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_TEENSY3_1) -# define OS_CLOCK 96000000 - -# elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE) || defined(TARGET_STM32F303ZE) -# define OS_CLOCK 72000000 - -# elif defined(TARGET_STM32F303K8) -# define OS_CLOCK 64000000 - -# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) \ - || defined(TARGET_KL26Z) || defined(TARGET_KL27Z) || defined(TARGET_KL05Z) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F051R8) || defined(TARGET_LPC11U68) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC) -# define OS_CLOCK 48000000 - -# elif defined(TARGET_LPC812) -# define OS_CLOCK 36000000 - -# elif defined(TARGET_LPC824) || defined(TARGET_SSCI824) -# define OS_CLOCK 30000000 - -# elif defined(TARGET_STM32F100RB) || defined(TARGET_BEETLE) -# define OS_CLOCK 24000000 - -# elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K66F) -# define OS_CLOCK 120000000 - -# elif defined(TARGET_LPC4330) -# define OS_CLOCK 204000000 - -# elif defined(TARGET_LPC4337) -# define OS_CLOCK 204000000 - -# elif defined(TARGET_STM32F407) || defined(TARGET_STM32F407VG) -# define OS_CLOCK 168000000 - -# elif defined(TARGET_STM32F401RE) -# define OS_CLOCK 84000000 - -# elif defined(TARGET_STM32F411RE) -# define OS_CLOCK 100000000 - -# elif defined(TARGET_STM32F207ZG) -# define OS_CLOCK 120000000 - -# elif defined(TARGET_STM32F410RB) -# define OS_CLOCK 100000000 - -#elif defined(TARGET_STM32F103RB) -# define OS_CLOCK 72000000 - -#elif defined(TARGET_STM32F429ZI) || defined(TARGET_UBLOX_C029) -# define OS_CLOCK 168000000 - -#elif defined(TARGET_STM32F302R8) -# define OS_CLOCK 72000000 - -#elif defined(TARGET_STM32L073RZ) -# define OS_CLOCK 32000000 - -#elif defined(TARGET_STM32F401VC) -# define OS_CLOCK 84000000 - -# elif defined(TARGET_STM32F746NG) || defined(TARGET_STM32F746ZG) || defined(TARGET_STM32F767ZI) || defined(TARGET_STM32F769NI) -# define OS_CLOCK 216000000 - -#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600) -# define OS_CLOCK 24000000 - -#elif defined(TARGET_MAX32620) -# define OS_CLOCK 96000000 - -#elif defined(TARGET_NZ32_SC151) -# define OS_CLOCK 32000000 - -#elif defined(TARGET_STM32L152RE) -# define OS_CLOCK 24000000 - -#elif defined(TARGET_STM32F446RE) || defined(TARGET_STM32F446ZE) || defined(TARGET_STM32F446VE) -# define OS_CLOCK 180000000 - -#elif defined(TARGET_STM32F070RB) -# define OS_CLOCK 48000000 - -#elif defined(TARGET_STM32L432KC) || defined(TARGET_STM32L476VG) || defined(TARGET_STM32L476RG) || defined(TARGET_K22F) -# define OS_CLOCK 80000000 - -#elif defined(TARGET_STM32F469NI) -# define OS_CLOCK 168000000 - -#elif defined(TARGET_STM32L152RC) -# define OS_CLOCK 24000000 - -#elif defined(TARGET_EFM32) -# include "clocking.h" -# define OS_CLOCK REFERENCE_FREQUENCY - -#elif defined(TARGET_MCU_NRF51822) -# define OS_CLOCK 32768 - -#elif defined(TARGET_MCU_NRF52832) -# define OS_CLOCK 64000000 - -#elif defined(TARGET_NUMAKER_PFM_NUC472) -# define OS_CLOCK 84000000 - -#elif defined(TARGET_NCS36510) -# define OS_CLOCK 32000000 - -# else -# error "no target defined" -# endif + #error "no target defined" #endif // RTX Timer tick interval value [us] <1-1000000>