mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #14243 from boraozgen/feature/stm32-rtc-hse
STM32: Add HSE support to RTCpull/14455/head
commit
f00ce59769
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@ -16,6 +16,7 @@
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#include "cmsis.h"
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#include "cmsis.h"
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#include "objects.h"
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#include "objects.h"
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#include "platform/mbed_error.h"
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#include "platform/mbed_error.h"
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#include "rtc_api_hal.h"
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int mbed_sdk_inited = 0;
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int mbed_sdk_inited = 0;
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extern void SetSysClock(void);
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extern void SetSysClock(void);
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@ -285,7 +286,15 @@ void mbed_sdk_init()
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/* Start LSI clock for RTC */
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/* Start LSI clock for RTC */
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#if DEVICE_RTC
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#if DEVICE_RTC
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#if !MBED_CONF_TARGET_LSE_AVAILABLE
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#if (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE)
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
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PeriphClkInitStruct.RTCClockSelection = (RCC_RTCCLKSOURCE_HSE_DIVX | RTC_HSE_DIV << 16);
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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error("PeriphClkInitStruct RTC failed with HSE\n");
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}
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#elif ((MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) && !MBED_CONF_TARGET_LSE_AVAILABLE) || (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSI)
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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if (__HAL_RCC_GET_RTC_SOURCE() != RCC_RTCCLKSOURCE_NO_CLK) {
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if (__HAL_RCC_GET_RTC_SOURCE() != RCC_RTCCLKSOURCE_NO_CLK) {
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@ -62,7 +62,14 @@ void rtc_init(void)
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while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
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while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
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}
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}
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#endif /* DUAL_CORE */
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#endif /* DUAL_CORE */
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#if MBED_CONF_TARGET_LSE_AVAILABLE
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#if (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE)
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(void)RCC_OscInitStruct;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
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PeriphClkInitStruct.RTCClockSelection = (RCC_RTCCLKSOURCE_HSE_DIVX | RTC_HSE_DIV << 16);
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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error("PeriphClkInitStruct RTC failed with HSE\n");
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}
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#elif (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) && MBED_CONF_TARGET_LSE_AVAILABLE
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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#if MBED_CONF_TARGET_LSE_BYPASS
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#if MBED_CONF_TARGET_LSE_BYPASS
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@ -82,7 +89,7 @@ void rtc_init(void)
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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error("PeriphClkInitStruct RTC failed with LSE\n");
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error("PeriphClkInitStruct RTC failed with LSE\n");
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}
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}
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#else /* MBED_CONF_TARGET_LSE_AVAILABLE */
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#else /* Fallback to LSI */
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#if TARGET_STM32WB
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#if TARGET_STM32WB
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI1;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI1;
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#else
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#else
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@ -101,7 +108,7 @@ void rtc_init(void)
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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error("PeriphClkInitStruct RTC failed with LSI\n");
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error("PeriphClkInitStruct RTC failed with LSI\n");
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}
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}
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#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
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#endif /* MBED_CONF_TARGET_RTC_CLOCK_SOURCE */
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#if defined(DUAL_CORE) && (TARGET_STM32H7)
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#if defined(DUAL_CORE) && (TARGET_STM32H7)
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LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, HSEM_CR_COREID_CURRENT);
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LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, HSEM_CR_COREID_CURRENT);
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#endif /* DUAL_CORE */
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#endif /* DUAL_CORE */
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@ -38,7 +38,26 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#if MBED_CONF_TARGET_LSE_AVAILABLE
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// Possible choices of the RTC_CLOCK_SOURCE configuration set in json file
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#define USE_RTC_CLK_LSE_OR_LSI 1
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#define USE_RTC_CLK_LSI 2
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#define USE_RTC_CLK_HSE 3
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#if !((MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) || (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSI) || (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE))
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#error "RTC clock configuration is invalid!"
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#endif
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#if (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE) && !(TARGET_STM32F2 || TARGET_STM32F3 || TARGET_STM32F4)
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#error "RTC from HSE not supported for this target"
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#endif
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#if (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE)
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#define RTC_CLOCK 1000000U
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#define RTC_HSE_DIV (HSE_VALUE / RTC_CLOCK)
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#if RTC_HSE_DIV > 31
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#error "HSE value too high for RTC"
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#endif
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#elif (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_LSE_OR_LSI) && MBED_CONF_TARGET_LSE_AVAILABLE
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#define RTC_CLOCK LSE_VALUE
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#define RTC_CLOCK LSE_VALUE
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#else
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#else
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#define RTC_CLOCK LSI_VALUE
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#define RTC_CLOCK LSI_VALUE
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@ -47,7 +66,11 @@ extern "C" {
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#if DEVICE_LPTICKER && !MBED_CONF_TARGET_LPTICKER_LPTIM
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#if DEVICE_LPTICKER && !MBED_CONF_TARGET_LPTICKER_LPTIM
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/* PREDIV_A : 7-bit asynchronous prescaler */
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/* PREDIV_A : 7-bit asynchronous prescaler */
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/* PREDIV_A is set to set LPTICKER frequency to RTC_CLOCK/4 */
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/* PREDIV_A is set to set LPTICKER frequency to RTC_CLOCK/4 */
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#if (MBED_CONF_TARGET_RTC_CLOCK_SOURCE == USE_RTC_CLK_HSE)
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#define PREDIV_A_VALUE 124
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#else
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#define PREDIV_A_VALUE 3
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#define PREDIV_A_VALUE 3
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#endif
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/** Read RTC counter with sub second precision
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/** Read RTC counter with sub second precision
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*
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*
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@ -1220,6 +1220,10 @@
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"help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
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"help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
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"value": "1"
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"value": "1"
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},
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},
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"rtc_clock_source": {
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"help": "Define the RTC clock source. USE_RTC_CLK_LSE_OR_LSI, USE_RTC_CLK_LSI, USE_RTC_CLK_HSE. LPTICKER is not available for HSE and should be removed from the target configuration.",
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"value": "USE_RTC_CLK_LSE_OR_LSI"
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},
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"lpuart_clock_source": {
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"lpuart_clock_source": {
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"help": "Define the LPUART clock source. Mask values: USE_LPUART_CLK_LSE, USE_LPUART_CLK_PCLK1, USE_LPUART_CLK_HSI",
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"help": "Define the LPUART clock source. Mask values: USE_LPUART_CLK_LSE, USE_LPUART_CLK_PCLK1, USE_LPUART_CLK_HSI",
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"value": "USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1"
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"value": "USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1"
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