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Restore TCPIP_THREAD_STACKSIZE and thread_stack_main 

move some TCPIP stack data to heap;
switch off GDMA for SPI (only for SPI);
TCPIP_THREAD_STACKSIZE and thread_stack_main are identical to ARMmbed
pull/4438/head
Yuguo Zou 2017-04-20 15:41:12 +08:00 committed by Martin Kojtal
parent c3bf1c5006
commit f000eb3401
11 changed files with 18 additions and 426 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_Realtek/lwipopts_conf.h
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@ -32,7 +32,7 @@
#define TCP_SND_BUF (10 * TCP_MSS)
#define TCP_WND (6 * TCP_MSS)
#define PBUF_POOL_SIZE 10
#define TCPIP_THREAD_STACKSIZE 1600
#endif

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/platform_autoconf.h
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@ -73,7 +73,7 @@
#define CONFIG_WDG 1
#undef CONFIG_WDG_NON
#define CONFIG_WDG_NORMAL 1
#define CONFIG_GDMA_EN 1
#define CONFIG_GDMA_EN 0
#define CONFIG_GDMA_NORMAL 1
#undef CONFIG_GDMA_TEST
#define CONFIG_GDMA_MODULE 1

2
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_ssi.h
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@ -554,7 +554,7 @@ HAL_Status HalSsiDmaRecvMultiBlockRtl8195a_V04(VOID * Adapter, u8 * pRxData, u32
#endif
#ifdef CONFIG_GDMA_EN
#if CONFIG_GDMA_EN
VOID HalSsiTxGdmaLoadDefRtl8195a(VOID *Adapter);
VOID HalSsiRxGdmaLoadDefRtl8195a(VOID *Adapter);
VOID HalSsiDmaInitRtl8195a(VOID *Adapter);

7
targets/TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp
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@ -74,7 +74,7 @@ static void wlan_set_hwaddr(emac_interface_t *emac, uint8_t *addr)
static bool wlan_link_out(emac_interface_t *emac, emac_stack_mem_t *buf)
{
struct eth_drv_sg sg_list[MAX_ETH_DRV_SG];
struct eth_drv_sg * sg_list=0;
int sg_len = 0;
int tot_len;
struct pbuf *p;
@ -84,6 +84,10 @@ static bool wlan_link_out(emac_interface_t *emac, emac_stack_mem_t *buf)
return false;
}
sg_list = (struct eth_drv_sg *)malloc(sizeof(struct eth_drv_sg)*MAX_ETH_DRV_SG);
if(sg_list == 0){//malloc fail
return false;
}
emac_stack_mem_ref(emac, buf);
p = (struct pbuf *)buf;
@ -101,6 +105,7 @@ static bool wlan_link_out(emac_interface_t *emac, emac_stack_mem_t *buf)
}
emac_stack_mem_free(emac, buf);
free(sg_list);
return ret;
}

BIN
targets/TARGET_Realtek/TARGET_AMEBA/sdk/lib_peripheral_mbed.a
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targets/TARGET_Realtek/TARGET_AMEBA/sdk/lib_peripheral_mbed.ar
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targets/TARGET_Realtek/TARGET_AMEBA/sdk/lib_wlan_mbed.a
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targets/TARGET_Realtek/TARGET_AMEBA/sdk/lib_wlan_mbed.ar
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8
targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/hal_ssi.h
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@ -136,7 +136,7 @@ typedef uint32_t *PSSI_DBG_TYPE_LIST;
IRQ_HANDLE TxGdmaIrqHandle;
}SSI_DMA_CONFIG, *PSSI_DMA_CONFIG;
#ifdef CONFIG_GDMA_EN
#if CONFIG_GDMA_EN
typedef struct _HAL_SSI_DMA_MULTIBLK_ {
volatile GDMA_CH_LLI_ELE GdmaChLli[16];
struct GDMA_CH_LLI Lli[16];
@ -191,7 +191,7 @@ typedef struct _HAL_SSI_ADAPTOR_ {
u8 HaveTxChannel;
u8 HaveRxChannel;
u8 DefaultRxThresholdLevel;
#ifdef CONFIG_GDMA_EN
#if CONFIG_GDMA_EN
SSI_DMA_MULTIBLK DmaTxMultiBlk, DmaRxMultiBlk;
#endif
u32 ReservedDummy;
@ -278,7 +278,7 @@ struct spi_s {
u32 dma_en;
volatile u32 state;
u8 sclk;
#ifdef CONFIG_GDMA_EN
#if CONFIG_GDMA_EN
HAL_GDMA_ADAPTER spi_gdma_adp_tx;
HAL_GDMA_ADAPTER spi_gdma_adp_rx;
#endif
@ -304,7 +304,7 @@ HAL_Status HalSsiTimeout(u32 StartCount, u32 TimeoutCnt);
HAL_Status HalSsiStopRecv(VOID * Data);
HAL_Status HalSsiSetFormat(VOID * Data);
VOID HalSsiClearFIFO(VOID * Data);
#ifdef CONFIG_GDMA_EN
#if CONFIG_GDMA_EN
HAL_Status HalSsiTxGdmaInit(PHAL_SSI_OP pHalSsiOp, PHAL_SSI_ADAPTOR pHalSsiAdapter);
VOID HalSsiTxGdmaDeInit(PHAL_SSI_ADAPTOR pHalSsiAdapter);
HAL_Status HalSsiRxGdmaInit(PHAL_SSI_OP pHalSsiOp, PHAL_SSI_ADAPTOR pHalSsiAdapter);

419
targets/TARGET_Realtek/TARGET_AMEBA/serial_api.c
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@ -17,9 +17,6 @@
#include "rtl8195a.h"
#include "objects.h"
#include "serial_api.h"
#ifndef CONFIG_MBED_ENABLED
#include "serial_ex_api.h"
#endif
#if CONFIG_UART_EN
#include "pinmap.h"
@ -306,19 +303,16 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
pHalRuartAdapter->Interrupts |= RUART_IER_ERBI | RUART_IER_ELSI;
serial_irq_en[uart_idx] |= SERIAL_RX_IRQ_EN;
HalRuartSetIMRRtl8195a (pHalRuartAdapter);
}
else {
} else {
serial_irq_en[uart_idx] |= SERIAL_TX_IRQ_EN;
}
pHalRuartOp->HalRuartRegIrq(pHalRuartAdapter);
pHalRuartOp->HalRuartIntEnable(pHalRuartAdapter);
}
else { // disable
} else { // disable
if (irq == RxIrq) {
pHalRuartAdapter->Interrupts &= ~(RUART_IER_ERBI | RUART_IER_ELSI);
serial_irq_en[uart_idx] &= ~SERIAL_RX_IRQ_EN;
}
else {
} else {
pHalRuartAdapter->Interrupts &= ~RUART_IER_ETBEI;
serial_irq_en[uart_idx] &= ~SERIAL_TX_IRQ_EN;
}
@ -382,8 +376,7 @@ int serial_readable(serial_t *obj)
if ((HAL_RUART_READ32(uart_idx, RUART_LINE_STATUS_REG_OFF)) & RUART_LINE_STATUS_REG_DR) {
return 1;
}
else {
} else {
return 0;
}
}
@ -402,8 +395,7 @@ int serial_writable(serial_t *obj)
if (HAL_RUART_READ32(uart_idx, RUART_LINE_STATUS_REG_OFF) &
(RUART_LINE_STATUS_REG_THRE)) {
return 1;
}
else {
} else {
return 0;
}
}
@ -423,24 +415,6 @@ void serial_clear(serial_t *obj)
HalRuartResetTRxFifo((VOID *)pHalRuartAdapter);
}
#ifndef CONFIG_MBED_ENABLED
void serial_clear_tx(serial_t *obj)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
pHalRuartAdapter = &(obj->hal_uart_adp);
HalRuartResetTxFifo((VOID *)pHalRuartAdapter);
}
void serial_clear_rx(serial_t *obj)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
pHalRuartAdapter = &(obj->hal_uart_adp);
HalRuartResetRxFifo((VOID *)pHalRuartAdapter);
}
#endif
void serial_break_set(serial_t *obj)
{
#ifdef CONFIG_MBED_ENABLED
@ -483,389 +457,6 @@ void serial_pinout_tx(PinName tx)
}
#ifndef CONFIG_MBED_ENABLED
void serial_send_comp_handler(serial_t *obj, void *handler, uint32_t id)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
pHalRuartAdapter = &(obj->hal_uart_adp);
pHalRuartAdapter->TxCompCallback = (void(*)(void*))handler;
pHalRuartAdapter->TxCompCbPara = (void*)id;
}
void serial_recv_comp_handler(serial_t *obj, void *handler, uint32_t id)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
pHalRuartAdapter = &(obj->hal_uart_adp);
pHalRuartAdapter->RxCompCallback = (void(*)(void*))handler;
pHalRuartAdapter->RxCompCbPara = (void*)id;
}
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
// Our UART cannot specify the RTS/CTS pin seprately, so the ignore the rxflow, txflow pin
// We just use the hardware auto flow control, so cannot do flow-control single direction only
pHalRuartAdapter = &(obj->hal_uart_adp);
switch(type) {
case FlowControlRTSCTS:
pHalRuartAdapter->FlowControl = AUTOFLOW_ENABLE;
pHalRuartAdapter->RTSCtrl = 1;
break;
case FlowControlRTS: // to indicate peer that it's ready for RX
// It seems cannot only enable RTS
pHalRuartAdapter->FlowControl = AUTOFLOW_ENABLE;
pHalRuartAdapter->RTSCtrl = 1;
break;
case FlowControlCTS: // to check is the peer ready for RX: if can start TX ?
// need to check CTS before TX
pHalRuartAdapter->FlowControl = AUTOFLOW_ENABLE;
pHalRuartAdapter->RTSCtrl = 1;
break;
case FlowControlNone:
default:
pHalRuartAdapter->FlowControl = AUTOFLOW_DISABLE;
pHalRuartAdapter->RTSCtrl = 1; // RTS pin allways Low, peer can send data
break;
}
HalRuartFlowCtrl((VOID *)pHalRuartAdapter);
}
void serial_rts_control(serial_t *obj, BOOLEAN rts_state)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
pHalRuartAdapter = &(obj->hal_uart_adp);
pHalRuartAdapter->RTSCtrl = !rts_state;
HalRuartRTSCtrlRtl8195a(pHalRuartAdapter, pHalRuartAdapter->RTSCtrl);
}
// Blocked(busy wait) receive, return received bytes count
int32_t serial_recv_blocked (serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
int ret;
pHalRuartOp = &(obj->hal_uart_op);
obj->rx_len = len;
HalRuartEnterCritical(pHalRuartAdapter);
ret = pHalRuartOp->HalRuartRecv(pHalRuartAdapter, (u8*)prxbuf, len, timeout_ms);
HalRuartExitCritical(pHalRuartAdapter);
return (ret);
}
// Blocked(busy wait) send, return transmitted bytes count
int32_t serial_send_blocked (serial_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
int ret;
pHalRuartOp = &(obj->hal_uart_op);
obj->tx_len = len;
ret = pHalRuartOp->HalRuartSend(pHalRuartAdapter, (u8*)ptxbuf, len, timeout_ms);
return (ret);
}
int32_t serial_recv_stream (serial_t *obj, char *prxbuf, uint32_t len)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
int ret;
pHalRuartOp = &(obj->hal_uart_op);
obj->rx_len = len;
ret = pHalRuartOp->HalRuartIntRecv(pHalRuartAdapter, (u8*)prxbuf, len);
return (ret);
}
int32_t serial_send_stream (serial_t *obj, char *ptxbuf, uint32_t len)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
int ret;
pHalRuartOp = &(obj->hal_uart_op);
obj->tx_len = len;
HalRuartEnterCritical(pHalRuartAdapter);
ret = pHalRuartOp->HalRuartIntSend(pHalRuartAdapter, (u8*)ptxbuf, len);
HalRuartExitCritical(pHalRuartAdapter);
return (ret);
}
#ifdef CONFIG_GDMA_EN
int32_t serial_recv_stream_dma (serial_t *obj, char *prxbuf, uint32_t len)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
u8 uart_idx = pHalRuartAdapter->UartIndex;
int32_t ret;
pHalRuartOp = &(obj->hal_uart_op);
if ((serial_dma_en[uart_idx] & SERIAL_RX_DMA_EN)==0) {
PUART_DMA_CONFIG pHalRuartDmaCfg;
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
if (HAL_OK == HalRuartRxGdmaInit(pHalRuartAdapter, pHalRuartDmaCfg, 0)) {
serial_dma_en[uart_idx] |= SERIAL_RX_DMA_EN;
}
else {
return HAL_BUSY;
}
}
obj->rx_len = len;
HalRuartEnterCritical(pHalRuartAdapter);
ret = HalRuartDmaRecv(pHalRuartAdapter, (u8*)prxbuf, len);
HalRuartExitCritical(pHalRuartAdapter);
return (ret);
}
int32_t serial_send_stream_dma (serial_t *obj, char *ptxbuf, uint32_t len)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
u8 uart_idx = pHalRuartAdapter->UartIndex;
int32_t ret;
pHalRuartOp = &(obj->hal_uart_op);
if ((serial_dma_en[uart_idx] & SERIAL_TX_DMA_EN)==0) {
PUART_DMA_CONFIG pHalRuartDmaCfg;
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
if (HAL_OK == HalRuartTxGdmaInit(pHalRuartAdapter, pHalRuartDmaCfg, 0)) {
serial_dma_en[uart_idx] |= SERIAL_TX_DMA_EN;
}
else {
return HAL_BUSY;
}
}
obj->tx_len = len;
HalRuartEnterCritical(pHalRuartAdapter);
ret = HalRuartDmaSend(pHalRuartAdapter, (u8*)ptxbuf, len);
HalRuartExitCritical(pHalRuartAdapter);
return (ret);
}
int32_t serial_recv_stream_dma_timeout (serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms, void *force_cs)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
u8 uart_idx = pHalRuartAdapter->UartIndex;
uint32_t TimeoutCount=0, StartCount;
int ret;
void (*task_yield)(void);
pHalRuartOp = &(obj->hal_uart_op);
if ((serial_dma_en[uart_idx] & SERIAL_RX_DMA_EN)==0) {
PUART_DMA_CONFIG pHalRuartDmaCfg;
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
if (HAL_OK == HalRuartRxGdmaInit(pHalRuartAdapter, pHalRuartDmaCfg, 0)) {
serial_dma_en[uart_idx] |= SERIAL_RX_DMA_EN;
}
else {
return HAL_BUSY;
}
}
HalRuartEnterCritical(pHalRuartAdapter);
ret = HalRuartDmaRecv(pHalRuartAdapter, (u8*)prxbuf, len);
HalRuartExitCritical(pHalRuartAdapter);
if ((ret == HAL_OK) && (timeout_ms > 0)) {
TimeoutCount = (timeout_ms*1000/TIMER_TICK_US);
StartCount = HalTimerOp.HalTimerReadCount(1);
task_yield = (void (*)(void))force_cs;
pHalRuartAdapter->Status = HAL_UART_STATUS_OK;
while (pHalRuartAdapter->State & HAL_UART_STATE_BUSY_RX) {
if (HAL_TIMEOUT == RuartIsTimeout(StartCount, TimeoutCount)) {
ret = pHalRuartOp->HalRuartStopRecv((VOID*)pHalRuartAdapter);
ret = pHalRuartOp->HalRuartResetRxFifo((VOID*)pHalRuartAdapter);
pHalRuartAdapter->Status = HAL_UART_STATUS_TIMEOUT;
break;
}
if (NULL != task_yield) {
task_yield();
}
}
if (pHalRuartAdapter->Status == HAL_UART_STATUS_TIMEOUT) {
return (len - pHalRuartAdapter->RxCount);
} else {
return len;
}
} else {
return (-ret);
}
return (ret);
}
#endif // end of "#ifdef CONFIG_GDMA_EN"
int32_t serial_send_stream_abort (serial_t *obj)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
int ret;
pHalRuartOp = &(obj->hal_uart_op);
HalRuartEnterCritical(pHalRuartAdapter);
ret = pHalRuartOp->HalRuartStopSend((VOID*)pHalRuartAdapter);
HalRuartExitCritical(pHalRuartAdapter);
if (HAL_OK != ret) {
return -ret;
}
HalRuartResetTxFifo((VOID*)pHalRuartAdapter);
ret = obj->tx_len - pHalRuartAdapter->TxCount;
return (ret);
}
int32_t serial_recv_stream_abort (serial_t *obj)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
int ret;
pHalRuartOp = &(obj->hal_uart_op);
HalRuartEnterCritical(pHalRuartAdapter);
ret = pHalRuartOp->HalRuartStopRecv((VOID*)pHalRuartAdapter);
HalRuartExitCritical(pHalRuartAdapter);
if (HAL_OK != ret) {
return -ret;
}
ret = obj->rx_len - pHalRuartAdapter->RxCount;
return (ret);
}
void serial_disable (serial_t *obj)
{
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
HalRuartDisable((VOID*)pHalRuartAdapter);
}
void serial_enable (serial_t *obj)
{
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
HalRuartEnable((VOID*)pHalRuartAdapter);
}
// return the byte count received before timeout, or error(<0)
int32_t serial_recv_stream_timeout (serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms, void *force_cs)
{
PHAL_RUART_OP pHalRuartOp;
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
uint32_t TimeoutCount=0, StartCount;
int ret;
void (*task_yield)(void);
task_yield = NULL;
pHalRuartOp = &(obj->hal_uart_op);
HalRuartEnterCritical(pHalRuartAdapter);
ret = pHalRuartOp->HalRuartIntRecv(pHalRuartAdapter, (u8*)prxbuf, len);
HalRuartExitCritical(pHalRuartAdapter);
if ((ret == HAL_OK) && (timeout_ms > 0)) {
TimeoutCount = (timeout_ms*1000/TIMER_TICK_US);
StartCount = HalTimerOp.HalTimerReadCount(1);
task_yield = (void (*)(void))force_cs;
while (pHalRuartAdapter->State & HAL_UART_STATE_BUSY_RX) {
if (HAL_TIMEOUT == RuartIsTimeout(StartCount, TimeoutCount)) {
ret = pHalRuartOp->HalRuartStopRecv((VOID*)pHalRuartAdapter);
ret = pHalRuartOp->HalRuartResetRxFifo((VOID*)pHalRuartAdapter);
pHalRuartAdapter->Status = HAL_UART_STATUS_TIMEOUT;
break;
}
if (NULL != task_yield) {
task_yield();
}
}
return (len - pHalRuartAdapter->RxCount);
} else {
return (-ret);
}
}
// to hook lock/unlock function for multiple-thread application
void serial_hook_lock(serial_t *obj, void *lock, void *unlock, uint32_t id)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
pHalRuartAdapter = &(obj->hal_uart_adp);
pHalRuartAdapter->EnterCritical = (void (*)(void))lock;
pHalRuartAdapter->ExitCritical = (void (*)(void))unlock;
}
// to read Line-Status register
// Bit 0: RX Data Ready
// Bit 1: Overrun Error
// Bit 2: Parity Error
// Bit 3: Framing Error
// Bit 4: Break Interrupt (received data input is held in 0 state for a longer than a full word tx time)
// Bit 5: TX FIFO empty (THR empty)
// Bit 6: TX FIFO empty (THR & TSR both empty)
// Bit 7: RX Error (parity error, framing error or break indication)
uint8_t serial_raed_lsr(serial_t *obj)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
uint8_t RegValue;
pHalRuartAdapter = &(obj->hal_uart_adp);
RegValue = HAL_RUART_READ8(pHalRuartAdapter->UartIndex, RUART_LINE_STATUS_REG_OFF);
return RegValue;
}
// to read Modem-Status register
// Bit 0: DCTS, The CTS line has changed its state
// Bit 1: DDSR, The DSR line has changed its state
// Bit 2: TERI, RI line has changed its state from low to high state
// Bit 3: DDCD, DCD line has changed its state
// Bit 4: Complement of the CTS input
// Bit 5: Complement of the DSR input
// Bit 6: Complement of the RI input
// Bit 7: Complement of the DCD input
uint8_t serial_read_msr(serial_t *obj)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
uint8_t RegValue;
pHalRuartAdapter = &(obj->hal_uart_adp);
RegValue = HAL_RUART_READ8(pHalRuartAdapter->UartIndex, RUART_MODEM_STATUS_REG_OFF);
return RegValue;
}
// to set the RX FIFO level to trigger RX interrupt/RTS de-assert
// FifoLv:
// 0: 1-Byte
// 1: 4-Byte
// 2: 8-Byte
// 3: 14-Byte
void serial_rx_fifo_level(serial_t *obj, SerialFifoLevel FifoLv)
{
PHAL_RUART_ADAPTER pHalRuartAdapter;
uint8_t RegValue;
pHalRuartAdapter = &(obj->hal_uart_adp);
RegValue = (RUART_FIFO_CTL_REG_DMA_ENABLE | RUART_FIFO_CTL_REG_FIFO_ENABLE) | (((uint8_t)FifoLv&0x03) << 6);
HAL_RUART_WRITE8(pHalRuartAdapter->UartIndex, RUART_FIFO_CTL_REG_OFF, RegValue);
}
#endif
#if DEVICE_SERIAL_ASYNCH
#endif
#endif

4
targets/TARGET_Realtek/TARGET_AMEBA/spi_api.c
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@ -28,10 +28,6 @@ void spi_tx_done_callback(VOID *obj);
void spi_rx_done_callback(VOID *obj);
void spi_bus_tx_done_callback(VOID *obj);
#ifdef CONFIG_GDMA_EN
HAL_GDMA_OP SpiGdmaOp;
#endif
//TODO: Load default Setting: It should be loaded from external setting file.
extern const DW_SSI_DEFAULT_SETTING SpiDefaultSetting;