ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

STM32H7: Fix wrong address for DTCM in linker script (#346) 

* STM32H7: Fix wrong address for DTCM in linker script

* Fix tab
pull/15530/head
Jamie Smith 2024-09-17 08:37:26 -07:00 committed by GitHub
parent a49d8f2470
commit ef8181a129
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
12 changed files with 18 additions and 203 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
platform/source/mbed_board.c
View File

@ -28,8 +28,9 @@ WEAK MBED_NORETURN void mbed_die(void)
#if !defined(TARGET_EFM32)
core_util_critical_section_enter();
#endif
gpio_t led_err;
#ifdef LED1
gpio_t led_err;
gpio_init_out(&led_err, LED1);
#endif

32
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG/cmsis_nvic.h
View File

@ -17,36 +17,6 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x100000 // 1 MB
#endif
// 0x20000000 - 0x2001FFFF 128K DTCM
// 0x24000000 - 0x2404FFFF 320K AXI SRAM
// 0x30000000 - 0x30003FFF 16K SRAM1
// 0x30004000 - 0x30007FFF 16K SRAM2
// 0x38000000 - 0x38003FFF 16K SRAM4
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x20000 // 128 KB
#endif
#if !defined(MBED_RAM1_START)
#define MBED_RAM1_START 0x24000000
#endif
#if !defined(MBED_RAM1_SIZE)
#define MBED_RAM1_SIZE 0x50000 // 320 KB
#endif
#define NVIC_NUM_VECTORS 180
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

32
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H725xE/cmsis_nvic.h
View File

@ -17,37 +17,7 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x80000 // 512 KB
#endif
// 0x38000000 - 0x38003FFF 16K SRAM4
// 0x30004000 - 0x30007FFF 16K SRAM2
// 0x30000000 - 0x30003FFF 16K SRAM1
// 0x24000000 - 0x2404FFFF 320K AXI SRAM
// 0x20000000 - 0x2001FFFF 128K DTCM
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x20000 // 128 KB
#endif
#if !defined(MBED_RAM1_START)
#define MBED_RAM1_START 0x24000000
#endif
#if !defined(MBED_RAM1_SIZE)
#define MBED_RAM1_SIZE 0x50000 // 320 KB
#endif
#define NVIC_NUM_VECTORS 180
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

21
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H735xG/cmsis_nvic.h
View File

@ -17,27 +17,6 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x100000 // 1 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
// 0x38000000 - 0x38003FFF 16K SRAM4
// 0x30004000 - 0x30007FFF 16K SRAM2
// 0x30000000 - 0x30003FFF 16K SRAM1
// 0x24000000 - 0x2404FFFF 320K AXI SRAM
// 0x20000000 - 0x2001FFFF 128K DTCM
#define MBED_RAM_SIZE 0x50000 // 320 KB
#endif
#define NVIC_NUM_VECTORS 180
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START

2
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld
View File

@ -119,7 +119,7 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);

34
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h
View File

@ -17,39 +17,7 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
// 0x0x08000000-0x080FFFFF Bank1 (8 x 128K sectors)
// 0x0x08100000-0x081FFFFF Bank2 (8 x 128K sectors)
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
// 0x38000000 - 0x3800FFFF 64K SRAM4
// 0x30040000 - 0x30047FFF 32K SRAM3
// 0x30020000 - 0x3003FFFF 128K SRAM2
// 0x30000000 - 0x3001FFFF 128K SRAM1
// 0x24000000 - 0x2407FFFF 512K AXI SRAM
// 0x20000000 - 0x2001FFFF 128K DTCM
#define MBED_RAM_SIZE 0x20000 // 128 KB
#endif
#if !defined(MBED_RAM1_START)
#define MBED_RAM1_START 0x24000000
#endif
#if !defined(MBED_RAM1_SIZE)
#define MBED_RAM1_SIZE 0x80000 // 512 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

18
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H750xB/cmsis_nvic.h
View File

@ -17,23 +17,7 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x20000 // 128 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x80000 // 512 KB
#endif
#define NVIC_NUM_VECTORS 168
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

34
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/cmsis_nvic.h
View File

@ -17,39 +17,7 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
// 0x0x08000000-0x080FFFFF Bank1 (8 x 128K sectors)
// 0x0x08100000-0x081FFFFF Bank2 (8 x 128K sectors)
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
// 0x38000000 - 0x3800FFFF 64K SRAM4
// 0x30040000 - 0x30047FFF 32K SRAM3
// 0x30020000 - 0x3003FFFF 128K SRAM2
// 0x30000000 - 0x3001FFFF 128K SRAM1
// 0x24000000 - 0x2407FFFF 512K AXI SRAM
// 0x20000000 - 0x2001FFFF 128K DTCM
#define MBED_RAM_SIZE 0x20000 // 128 KB
#endif
#if !defined(MBED_RAM1_START)
#define MBED_RAM1_START 0x24000000
#endif
#if !defined(MBED_RAM1_SIZE)
#define MBED_RAM1_SIZE 0x80000 // 512 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

18
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/cmsis_nvic.h
View File

@ -17,23 +17,7 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x100000 // 1.0 MB
#endif
#define NVIC_NUM_VECTORS 172
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

18
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7B3xIQ/cmsis_nvic.h
View File

@ -17,23 +17,7 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x100000 // 1.0 MB
#endif
#define NVIC_NUM_VECTORS 172
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_BANK_SRAM_DTC_START
#endif

4
tools/cmake/CheckPythonPackage.cmake
View File

@ -27,7 +27,9 @@ function(check_python_package PACKAGENAME OUTPUT_VAR)
set(PY_INTERP_FOR_${OUTPUT_VAR} ${Python3_EXECUTABLE} CACHE INTERNAL "The python interpreter used to run the ${OUTPUT_VAR} check" FORCE)
execute_process(
COMMAND ${Python3_EXECUTABLE} -c "import ${PACKAGENAME}" RESULT_VARIABLE PACKAGECHECK_RESULT
COMMAND ${Python3_EXECUTABLE} -c "import ${PACKAGENAME}"
RESULT_VARIABLE PACKAGECHECK_RESULT
ERROR_QUIET
)
if(${PACKAGECHECK_RESULT} EQUAL 0)

5
tools/cmake/mbed_set_linker_script.cmake
View File

@ -29,6 +29,11 @@ function(mbed_setup_linker_script mbed_os_target mbed_baremetal_target target_de
# Find the path to the desired linker script
# (the property should be set on both the OS and baremetal targets in a sane world)
get_property(RAW_LINKER_SCRIPT_PATHS_SET TARGET ${mbed_baremetal_target} PROPERTY INTERFACE_MBED_LINKER_SCRIPT SET)
if(NOT RAW_LINKER_SCRIPT_PATHS_SET)
message(FATAL_ERROR "No linker script has been set for the Mbed target. Ensure that code is calling mbed_set_linker_script() for the mbed-<your-board-name> target or one of its parents")
endif()
get_property(RAW_LINKER_SCRIPT_PATHS TARGET ${mbed_baremetal_target} PROPERTY INTERFACE_MBED_LINKER_SCRIPT)
# Check if two (or more) different linker scripts got used