diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/stm32l476xx.icf b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/stm32l476xx.icf
index 9571587029..95ff4c4cc2 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/stm32l476xx.icf
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/stm32l476xx.icf
@@ -31,5 +31,5 @@ do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
-place in SRAM2_region { readwrite, block STACKHEAP };
-place in SRAM1_region { };
+place in SRAM1_region { readwrite, block STACKHEAP };
+place in SRAM2_region { };
diff --git a/workspace_tools/export/gcc_arm_nucleo_l476rg.tmpl b/workspace_tools/export/gcc_arm_nucleo_l476rg.tmpl
new file mode 100644
index 0000000000..6e616cc884
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_nucleo_l476rg.tmpl
@@ -0,0 +1 @@
+{% extends "gcc_arm_common.tmpl" %}
diff --git a/workspace_tools/export/iar_nucleo_l476rg.ewd.tmpl b/workspace_tools/export/iar_nucleo_l476rg.ewd.tmpl
new file mode 100644
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diff --git a/workspace_tools/export/iar_nucleo_l476rg.ewp.tmpl b/workspace_tools/export/iar_nucleo_l476rg.ewp.tmpl
new file mode 100644
index 0000000000..5aa362353b
--- /dev/null
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diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py
index 6f2f9887e8..c951c85f32 100644
--- a/workspace_tools/export/uvision4.py
+++ b/workspace_tools/export/uvision4.py
@@ -58,7 +58,7 @@ class Uvision4(Exporter):
'NUCLEO_L053R8',
'NUCLEO_L073RZ',
'NUCLEO_L152RE',
- #'NUCLEO_L476RG', removed because uvision4_nucleo_l476rg.uvproj.tmpl is missing
+ 'NUCLEO_L476RG',
'UBLOX_C027',
'LPC1549',
'LPC11U68',
diff --git a/workspace_tools/export/uvision4_nucleo_l476rg.uvopt.tmpl b/workspace_tools/export/uvision4_nucleo_l476rg.uvopt.tmpl
new file mode 100644
index 0000000000..102a2da591
--- /dev/null
+++ b/workspace_tools/export/uvision4_nucleo_l476rg.uvopt.tmpl
@@ -0,0 +1,211 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+
+
+
+ 0
+ 0
+
+
+
+ mbed NUCLEO_L476RG
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 1
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+
+
+ 1
+ 65535
+ 0
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+ 0
+
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+ 79
+ 66
+ 8
+ .\build\
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+ (105=-1,-1,-1,-1,0)
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+ -U0672FF535157876667210741 -O2287 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L476RG$Flash\STM32L4xx_1024.FLM)
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diff --git a/workspace_tools/export/uvision4_nucleo_l476rg.uvproj.tmpl b/workspace_tools/export/uvision4_nucleo_l476rg.uvproj.tmpl
new file mode 100644
index 0000000000..d84c5a58fb
--- /dev/null
+++ b/workspace_tools/export/uvision4_nucleo_l476rg.uvproj.tmpl
@@ -0,0 +1,440 @@
+
+
+
+ 1.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ mbed NUCLEO_L476RG
+ 0x4
+ ARM-ADS
+
+
+ STM32L476RG
+ STMicroelectronics
+ Keil.STM32L4xx_DFP.1.0.0
+ http://www.keil.com/pack
+ IROM(0x08000000,0x100000) IRAM(0x20000000,0x18000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE
+
+
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx -FS08000000 -FL0100000 -FP0($$Device:STM32L476RG$Flash\STM32L4xx.FLM))
+ 0
+ $$Device:STM32L476RG$Device\Include\stm32l4xx.h
+
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+ $$Device:STM32L476RG$SVD\STM32L4x.svd
+ 0
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+ fromelf --bin -o build\{{name}}_NUCLEO_L476RG.bin build\{{name}}.axf
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+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
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+ TCM.DLL
+ -pCM4
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+ STLink\ST-LINKIII-KEIL_SWO.dll
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+ STLink\ST-LINKIII-KEIL_SWO.dll
+ "" ()
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+ {% for flag in flags %}{{flag}} {% endfor %}
+ {% for s in symbols %} {{s}}, {% endfor %}
+
+ {% for path in include_paths %} {{path}}; {% endfor %}
+
+
+
+ 1
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+ {{scatter_file}}
+
+
+
+ {% for file in object_files %}
+ {{file}}
+ {% endfor %}
+
+
+
+
+
+
+
+ {% for group,files in source_files %}
+
+ {{group}}
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+ {% for file in files %}
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+ {{file.name}}
+ {{file.type}}
+ {{file.path}}
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+ {% endfor %}
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+ {% endfor %}
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+